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UM0324 Datasheet(PDF) 34 Page - STMicroelectronics |
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UM0324 Datasheet(HTML) 34 Page - STMicroelectronics |
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34 / 105 page  Running the demo program UM0324 34/105 3.6 Note on debugging tools The third party JTAG interface should always be isolated from the application using the MB535 JTAG opto-isolation board; it provides protection for both the JTAG interface and the PC connected to it. Caution: During a breakpoint, when using the JTAG interface for the firmware development, the motor control cell clock circuitry should always be enabled; if disabled, a permanent DC current may flow in the motor because the PWM outputs are enabled, which could cause permanent damage to the power stage and/or motor. A dedicated bit in the PWM_CR, the DBGC bit must be set to 1 (see Figure 18). Figure 18. DBGC bit in PWM control register (extract from STR750 reference manual) Control Register (PWM_CR) Address Offset: 00h Reset value: 0000h |
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