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PD17012 Datasheet(PDF) 3 Page - Renesas Technology Corp |
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PD17012 Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 320 page ![]() DATA SHEET © 1994, 2000 The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. MOS INTEGRATED CIRCUIT µPD17012, 17P012 4-BIT SINGLE-CHIP MICROCONTROLLERS WITH DIGITAL TUNING SYSTEM HARDWARE DESCRIPTION The µPD17012 is a 4-bit single-chip CMOS microcontroller equipped with hardware for digital tuning systems. The µPD17P012 is a version of the µPD17012 with one-time PROM instead of mask ROM. The user can write programs to the µPD17P012 once, and it is ideal for experimental production of the µPD17012 during system design or small-scale production. This series employs a 17K architecture CPU that can directly manipulate the data memory, execute various operations, and control the peripheral hardware with a single instruction. All the instructions are one-word 16-bit instructions. Besides various I/O ports, an LCD controller/driver, A/D converter, D/A converter (PWM output), and BEEP output, this microcontroller has a prescaler that can operate at up to 250 MHz, a PLL frequency synthesizer, and frequency counter for digital tuning systems. This series therefore ideal for configuring a high-performance, multi- functional digital tuning system on a single chip. FEATURES • 17K architecture: General-purpose register method • Program memory (ROM) µPD17012: Mask ROM 8 KB (4,096 × 16 bits) µPD17P012: One-time PROM 8 KB (4,096 × 16 bits) • General-purpose data memory (RAM) 316 × 4 bits • Instruction execution time 4.44 µs (with 4.5 MHz crystal resonator) • Decimal operation • Table reference • Hardware for PLL frequency synthesizer Dual modulus prescaler (250 MHz max.), programmable divider, phase comparator, charge pump • Various peripheral hardware General-purpose I/O ports, LCD controller/driver, serial interface, A/D converter, D/A converter (PWM output), BEEP output, frequency counter • Interrupts External: 1 Internal: 3 • Power-on-reset, reset by CE pin, and power failure detector • Power-saving CMOS • Supply voltage: VDD = 5 V ±10% The mark shows major revised points. Document No. U10101EJ4V0DS00 (4th edition) Date Published August 2001 N CP(K) Printed in Japan |
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