LTC2302/LTC2306

20

23026fa

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

© LINEAR TECHNOLOGY CORPORATION 2008

LT 0908 REV A • PRINTED IN USA

TYPICAL APPLICATION

Clock Squaring/Level Shifting Circuit Allows Testing with RF Sine Generator,

Convert Re-Timing Flip-Flop Preserves Low Jitter Clock Timing

SDI

SDO

SCK

CONVST

SERIAL

PORT

ANALOG

INPUT

MUX

CONVERT ENABLE

MASTER

CLOCK

RF SIGNAL

GENERATOR

OR OTHER LOW

JITTER SOURCE

0.1μF

NC7SVU04P5X

LTC2302

LTC2306

GND

MASTER

CLOCK

CONVERT

ENABLE

JITTER

0.1μF

12-BIT

500ksps

ADC

+

–

10μF

0.1μF

1k

10μF

0.1μF

QD

PRE

NL17SZ74

CONTROL

LOGIC

(FPGA, CPLD,

DSP, ETC.)

Q CLR

1k

23026 TA02

50Ω

• • • • • •

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• • • • • •

CONVST

DATA TRANSFER

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