AN4467 datasheet(23/33 Pages) STMICROELECTRONICS

Part #	AN4467

Description	Getting started with STM32L0xx hardware development

PDF	33 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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23 / 33 page

DocID026156 Rev 2

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AN4467

Boot configuration

3.2

Embedded boot loader

The embedded boot loader is located in the System memory, programmed by ST during

production. It is used to reprogram the Non Volatile memory using one of the interfaces

listed in Table 3.

For additional information, refer to application note AN2606.

3.3

BOOT0 pin connection

The BOOT0 pin of the Root part number 1 has a lower VIL than the other GPIO (for details

see datasheet I/O static characteristics), thus as it does not fit CMOS requirement, when

driven by another CMOS circuit the signal level must be verified.

Table 3. Interfaces for different device categories

Interface

Ports

Device category

USART1

PA9/PA10

Cat 3

Cat 5

USART2

PA9/PA10

Cat 2

PA2/PA3

Cat 3

Cat 5

SPI1

PA4/PA5/PA6/PA7

Cat 2/3

Cat 5 (without USB)

SPI2

PB12/PB13/PB14/PB15

Cat 3

Cat 5 (without USB)

USB

PA11/PA12

Cat 5 (with USB)

I2C1

PB6/PB7

Cat 5 (without USB)

I2C2

PB10/PB11

Cat 5 (without USB)

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