LT1306 datasheet(6/16 Pages) LINER

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LT1306

PIN FUNCTIONS

VC (Pin 1): Compensation Pin for Error Amplifier. VC is

the output of the transconductance error amplifier. Loop

frequency compensation is done by connecting an RC

network from the VC pin to ground.

FB (Pin 2): Inverting Input of the Error Amplifier. Connect

the resistor divider tap here. Set output voltage according

to VOUT = 1.24V (1 + R1/R2).

VOUT (Pin 3): Output of the Switching Regulator and Emit-

ter of the Synchronous Rectifier. Connect appropriate

output capacitor from here to ground. VOUT must be kept

below 5.5V.

GND (Pin 4): Ground. Connect to local ground plane.

SW (Pin 5): Switch Pin. The collectors of the grounded

power switch and the synchronous rectifier. Keep the SW

trace as short as possible to minimize EMI.

CAP (Pin 6): Power Supply to the Synchronous Rectifier

Driver. The bootstrap capacitor and the blocking diode

are tied to this pin. The CAP voltage switches between a

low level of VIN – VD to a high level determined by the VSW

high level.

VIN (Pin 7): Supply or Battery Input Pin. Must be closely

bypassed to ground plane.

S/S (Pin 8): Shutdown and Synchronization Pin. Shut-

down is active low with a typical threshold of 0.9V. For

normal operation, the S/S pin is tied to VIN. To externally

synchronize the switching regulator, drive the S/S pin

with a pulse train.

BLOCK DIAGRA

Figure 2. LT1306 Block Diagram

–

VIN

S/S

GND

PWM CONTROL

1306 F02

1.24V

1.65V

UVLO

RAMP

COMPENSATION

REF/BIAS

SHUTDOWN

DELAY

SHDN

SYNC

300kHz OSC

CLK

IDLE

CAP

IRECT > 0

IRECT

SENSE

AMP

DCM

CONTROL

OUT

RECTIFIER

CE2

–

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