UPD753012GC datasheet(44/80 Pages) NEC

44 / 80 page

µPD753012, 753016, 753017

(2) Legend in explanation of operation

: A register, 4-bit accumulator

: B register

: C register

: D register

: E register

: H register

: L register

: X register

: XA register pair; 8-bit accumulator

: BC register pair

: DE register pair

: HL register pair

XA’

: XA’ expanded register pair

BC’

: BC’ expanded register pair

DE’

: DE’ expanded register pair

HL’

: HL’ expanded register pair

: Program counter

: Stack pointer

: Carry flag, bit accumulator

PSW

: Program status word

MBE

: Memory bank enable flag

RBE

: Register bank enable flag

PORTn

: Port n (n = 0-7)

IME

: Interrupt master enable flag

IPS

: Interrupt priority selection register

IEXXX

: Interrupt enable flag

RBS

: Register bank selection register

MBS

: Memory bank selection register

PCC

: Processor clock control register

: Separation between address and bit

(XX)

: The contents addressed by XX

XXH

: Hexadecimal data

UPD753012GC Datasheet(PDF) 44 Page - NEC

UPD753012GC Datasheet(HTML) 44 Page - NEC

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