Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

LTC1417IGN Datasheet(PDF) 19 Page - Linear Technology

Part # LTC1417IGN
Description  Low Power 14-Bit, 400ksps Sampling ADC Converter with Serial I/O
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1417IGN Datasheet(HTML) 19 Page - Linear Technology

Back Button LTC1417IGN Datasheet HTML 15Page - Linear Technology LTC1417IGN Datasheet HTML 16Page - Linear Technology LTC1417IGN Datasheet HTML 17Page - Linear Technology LTC1417IGN Datasheet HTML 18Page - Linear Technology LTC1417IGN Datasheet HTML 19Page - Linear Technology LTC1417IGN Datasheet HTML 20Page - Linear Technology LTC1417IGN Datasheet HTML 21Page - Linear Technology LTC1417IGN Datasheet HTML 22Page - Linear Technology LTC1417IGN Datasheet HTML 23Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 19 / 32 page
background image
19
LTC1417
APPLICATIONS INFORMATION
Figure 17. Internal Conversion Clock Selected. Data Transferred During Conversion Using
the ADC Clock Output as a Master Shift Clock (SCLK Driven from CLKOUT)
D12
D11
D11
D12
CAPTURE ON
RISING CLOCK
D13
D10
D9D8D7D6D5D4D3D2D1D0
FILL
ZEROS
D13
1
t2
t3
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
3
D13
D13
D12
D11
Hi-Z
Hi-Z
DATA N
DATA (N – 1)
(SAMPLE N)
(SAMPLE N + 1)
DOUT
EXTCLKIN = 5
CLKOUT (= SCLK)
CONVST
t10
tCONV
t5
SAMPLE
HOLD
HOLD
t7
t4
t8
1417 F17
BUSY (= RD)
t12
t11
CLKOUT
(= SCLK)
VIL
VOH
VOL
DOUT
CAPTURE ON
FALLING CLOCK
LTC1417
BUSY (= RD)
CLKOUT ( = SCLK)
BUSY
CONVST
CONVST
RD
SCLK
CLKOUT
DOUT
14
13
12
7
8
9
DOUT
µP OR DSP
(CONFIGURED
AS SLAVE)
OR
SHIFT
REGISTER
Serial Data Output During a Conversion
Using Internal Clock for Conversion and Data Transfer.
Figure 17 shows data from the previous conversion being
clocked out during the conversion with the LTC1417
internal clock providing both the conversion clock and the
SCLK. The internal clock has been optimized for the fastest
conversion time; consequently, this mode can provide the
best overall speed performance. To select the internal
conversion clock, tie EXTCLKIN (Pin 6) high. The internal
clock appears on CLKOUT (Pin 8) which can be tied to
SCLK (Pin 7) to supply the SCLK.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com