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UPD75P308 Datasheet(PDF) 20 Page - NEC |
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UPD75P308 Datasheet(HTML) 20 Page - NEC |
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20 / 34 page ![]() µPD75P308 20 SERIAL TRANSFER OPERATION TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: internal clock output) Parameter Symbol Conditions MIN. TYP. MAX. Unit 1600 ns tKCY1/2-50 ns 150 ns 400 ns 250 ns Output Output RL = 1k Ω, CL = 100pF* tKCY1 tKH1, tKL1 tSIK1 tKSI1 tKSO1 SCK Cycle Time SCK High-, Low-Level Widths SI Set-Up Time (vs. SCK ) SI Hold Time (vs. SCK ) SCK SO Output Delay Time ↑ ↑ ↓ → *: RL and CL are load resistance and load capacitance of the SO output line. TWO-LINE AND THREE-LINE SERIAL I/O MODES (SCK: external clock input) *: RL and CL are load resistance and load capacitance of the SO output line. Parameter Symbol Conditions MIN. TYP. MAX. Unit 800 ns 400 ns 100 ns 400 ns 300 ns Input Input RL = 1k Ω, CL = 100pF* tKCY2 tKH2, tKL2 tSIK2 tKSI2 tKSO2 ↑ ↓ → 5 5 ↑ SCK Cycle Time SCK High-, Low-Level Widths SI Set-Up Time (vs. SCK ) SI Hold Time (vs. SCK ) SCK SO Output Delay Time |
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