LTC1628 datasheet(27/32 Pages) LINER

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LTC1628/LTC1628-PG

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1628. These items are also illustrated graphically in

the layout diagram of Figure 10. The Figure 11 illustrates

the current waveforms present in the various branches of

the 2-phase synchronous regulators operating in the

continuous mode. Check the following in your layout:

1. Are the top N-channel MOSFETs M1 and M3 located

within 1cm of each other with a common drain connection

at CIN? Do not attempt to split the input decoupling for the

two channels as it can cause a large resonant loop.

2. Are the signal and power grounds kept separate? The

combined LTC1628 signal ground pin and the ground

return of CINTVCC must return to the combined COUT (–)

terminals. The path formed by the top N-channel MOSFET,

Schottky diode and the CIN capacitor should have short

leads and PC trace lengths. The output capacitor (–)

terminals should be connected as close as possible to the

(–) terminals of the input capacitor by placing the capaci-

tors next to each other and away from the Schottky loop

described above.

3. Do the LTC1628 VOSENSE pins resistive dividers con-

nect to the (+) terminals of COUT? The resistive divider

must be connected between the (+) terminal of COUT and

Figure 10. LTC1628 Recommended Printed Circuit Layout Diagram

CB2

CB1

FLTCPL

RPU

PGOOD

VPULL-UP

(<7V)

CINTVCC

CIN

CVIN

VIN

RIN

INTVCC

3.3V

*PGOOD ON THE LTC1628-PG

RUN/SS1

SENSE1+

SENSE1–

VOSENSE1

FREQSET

STBYMD

FCB

ITH1

SGND

3.3VOUT

ITH2

VOSENSE2

SENSE2–

SENSE2+

TG1

SW1

BOOST1

VIN

BG1

EXTVCC

INTVCC

PGND

BG2

BOOST2

SW2

TG2

RUN/SS2

LTC1628

COUT1

VOUT1

GND

VOUT2

1628 F10

COUT2

RSENSE

FLTCPL

(PGOOD)*

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