RT7310 datasheet(10/12 Pages) RICHTEK

10 / 12 page

RT7310

is a registered trademark of Richtek Technology Corporation.

www.richtek.com

DS7310-00

October

2014

Application Information

Output Current Setting

Considering the conversion efficiency, the programmed

DC level of the average output current (IOUT(t)) can be

derived as:

OUT_CC

TX1

1 N

CTR

2 N

 



SEC_PK

TX1

PRI_PK

CTR



in which CTRTX1 is the current transfer ratio of the

transformer TX1, ISEC_PK is the peak current of the

secondary side, and IPRI_PK is the peak current of the

primary side. CTRTX1 can be estimated to be 0.9.

According to the above parameters, current sense

resistor RCS can be determined as the following

equation :

TX1

OUT_CC

1 N

CTR

2 N

 



Propagation Delay Compensation Design

The VCS deviation (VCS) caused by propagation delay

effect can be derived as:





in which td is the delay period which includes the

propagation delay of RT7310 and the turn-off transition

of the main MOSFET. The sourcing current from CS pin

of RT7310 (ICS) can be expressed as :

ZCD1





where NA is the turns number of auxiliary winding.

RPC can be designed by :

ZCD1









Minimum On-Time Setting

RT7310 limits a minimum on-time (tON(MIN)) for each

switching cycle. The tON(MIN) is a function of the

sample-and-hold ZCD current (IZCD_SH) as following :

ON(MIN) ZCD_SH

405p sec A (typ.)







IZCD_SH can be expressed as :

ZCD_SH

ZCD1







Thus, RZCD1 can be determined by:

 

ON(MIN)

ZCD1

typ.

405p





In addition, the current flowing out of ZCD pin must be

lower than 2.5mA (typ.). Thus, the RZCD1 is also

determined by:

AC(MAX)

ZCD1

2.5m





where the VAC(MAX) is maximum input AC voltage.

Output Over-Voltage Protection Setting

Output OVP is achieved by sensing the knee voltage

on the auxiliary winging. It is recommended that output

OV level (VO_OVP) is set at 120% of nominal output

voltage (VO). Thus, RZCD1 and RZCD2 can be

determined by the equation as :

ZCD2

ZCD1

ZCD2

120%

3.1V (typ.)







Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature.

The maximum power dissipation can be calculated by

the following formula:

PD(MAX) = (TJ(MAX) − TA ) / θJA

Where TJ(MAX) is the maximum junction temperature,

TA is the ambient temperature, and θJA is the junction

to ambient thermal resistance.

For recommended operating condition specifications,

the maximum junction temperature is 125°C. The

junction to ambient

thermal resistance, θJA, is layout

dependent. For SOT-23-6 packages, the thermal

resistance, θJA, is 235.6°C/W on a standard JEDEC

51-3 two-layer thermal test board. The maximum power

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