IR3552 datasheet(14/23 Pages) IRF

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IR3552

40A Integrated PowIRstage

February 19, 2014 | FINAL

enable pins are not required which simplifies the

routing and layout in applications with a limited

number of board layers. It also provides switching

free of shoot-through for slow PWM transition times

of up to 20ns. The IR3552 is therefore tolerant of

stray capacitance on the PWM signal lines.

The IR3552 provides a pull-up bias current to drive

the PWM input to the tri-state condition of 3.3V when

the PWM controller output is in its high impedance

state. Multi-level pull-up currents are designed to

drive worst case stray capacitances and allows for

PWM transitions into the tri-state condition rapidly to

avoid a prolonged period of MOSFET conduction

during faults. The pull-up currents are disabled once

the PWM pin exceeds the tri-state threshold to

conserve power.

START UP IN IR ATL MODE

During initial startup in IR ATL mode, the IR3552

holds both high- and low-side MOSFETs off, even

after POR thresholds are reached. This mode is

maintained while the PWM signal is pulled to the

tri-state threshold level greater than the tri-state high

threshold

and

until

transitions

out

tri-state. It is this initial transition out of the tri-state

which enables both drivers to switch based on the

normal

PWM

voltage

levels.

This

startup

configuration also ensures that any undetermined

PWM signal levels from a controller in pre-POR state

will not result in high- or low-side MOSFET turn on

until the controller is out of its POR.

For Tri-state mode, the POR operation is the same

except the driver does not look for an input tri-state

before functioning.

HIGH-SIDE DRIVER

Each high-side driver controls an internal floating

N-channel MOSFET which can be switched at

1.5MHz.

The

external

bootstrap

BOOST

capacitor referenced to the SW node is used to bias

the internal MOSFET gate. When the SW node is at

ground, the bootstrap capacitor is charged to the

supply voltage using the BOOST PFET and this

stored charge is used to bias the internal MOSFET

when the PWM signal goes high. Once the high-side

MOSFET is turned on, the SW voltage is driven to

the VIN supply voltage and the BOOST pin voltage

is equal to VIN plus the VDRV voltage (note: without

any diode voltage drop).

When the PWM signal goes low, the high side

MOSFET is turned off by pulling the gate to the SW

voltage.

LOW-SIDE DRIVER

The IR3552 low-side driver is designed to drive the

internal N-channel MOSFET

to frequencies of

1.5MHz. The low-side driver is biased from the

VDRV supply voltage to turn the MOSFET on.

When the low-side MOSFET is turned on the SW

node is pulled to ground. This allows recharging of

the bootstrap capacitor for the next high-side

MOSFET drive event.

ADAPTIVE DEAD TIME ADJUSTMENT

In a synchronous buck configuration care should be

taken to prevent both high and low side MOSFETs

from being on simultaneously. Such an event could

result in very large shoot-through currents and could

lead to long term degradation of the power stage.

A fixed

dead

time

does

not

provide

optimal

performance due to variations in converter duty

cycles, bias voltages and temperature.

The

IR3552

provides

adaptive

dead

time

adjustment to minimize dead time to an optimum

duration which allows for maximum efficiency.

The ‘break before make’ adaptive design is achieved

by monitoring gate and SW voltages to determine

the ON or OFF status of a MOSFET. Adaptive

dead time also provides zero-voltage switching

(ZVS) of the low-side MOSFET with minimum

current conduction through its body-diode.

When operating in IR ATL mode, the PWM input

switches between 1.8V and 0V. The PWM falling

edge transition turns off the high-side MOSFET

and turns on the low-side MOSFET. The adaptive

dead time circuit ensures the internal high side

MOSFET Vgs is below 1.25V and the SW node

voltage is below 1.38V before the low side MOSFET

is turned on.

The PWM rising edge transition turns off the low-

side MOSFET and turns on the high-side MOSFET.

The adaptive dead time circuit ensures the internal

low side MOSFET Vgs is below 1.25V before the

high side MOSFET is turned on.

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