Fault-Protected Analog Multiplexers

8

_______________________________________________________________________________________

_________________________________Test Circuits/Timing Diagrams (continued)

+15V

-15V

GND

V+

A1

V-

A0

A2

NO8

COM

MAX354

NO1

EN

10nF

1k

OFF ISOLATION = 20log

10nF

+15V

-15V

GND

V+

A1

V-

A0

A2

NO8

COM

MAX354

NO2

EN

10nF

1k

CROSSTALK = 20log

10nF

NO1

R = 1k

Ω

+15V

-15V

GND

V+

A2

V-

A1

A0

NO8

MAX354

CHANNEL

SELECT

NO1

COM

EN

1MHz

CAPACITANCE

ANALYZER

f = 1MHz

Figure 5. Off Isolation

Figure 6. Crosstalk

Figure 7. NO/COM Capacitance

_______________Detailed Description

Fault-Protection Circuitry

Maxim’s MAX354/MAX355 are fully fault protected for

continuous input voltages up to ±40V, whether or not

the V+ and V- power supplies are present. These

devices use a “series FET” protection scheme that not

only protects the multiplexer output from overvoltage,

but also limits the input current to sub-microamp levels.

When signal voltages exceed or are within approxi-

mately 1.5V of the supply rails, on-resistance increas-

es. This greater on-resistance limits fault currents and

output voltage, protecting sensitive circuits and com-

ponents. The protected output clamps at approximately

1.5V below the supply rails and maintains the correct

polarity. There are no glitches or polarity reversals

going into or coming out of a fault condition.

Figures 8 and 9 show how the series FET circuit protects

against overvoltage conditions. When power is off, the

gates of all three FETs are at ground. With a -25V input,

N-channel FET Q1 is turned on by the +25V gate-to-

source voltage. The P-channel device (Q2), however,

input signal from reaching the output. If the input volt-

Similarly, only sub-microamp leakage currents can flow

from the output back to the input, since any voltage will

turn off either Q1 or Q2.