2.125Gbps, 3.3V

Quad-Port Bypass with Repeater

_______________________________________________________________________________________

9

Cascading Port Bypass Circuits

Two or more MAX3752 quad PBCs can be cascaded by

directly connecting the OUT+ and OUT- pins of one

quad PBC to the IN+ and IN- pins of the next quad PBC.

See Typical Operating Circuit.

Interfacing to 50

Ω Systems

Figure 5 shows examples of resistive impedance trans-

forming networks that can be used to interface between

the 75

Ω input/output structure of the MAX3752 and 50Ω

systems. The characteristics of the two examples

shown can be derived by referring to Figures 3, 4, and

5. The top configuration in Figure 5 is useful in designs

where the parallel 300

Ω resistors can be placed very

close to the input/output pins of the IC. In this case, the

50

Ω transmission lines should connect directly to the

IC.

The bottom configuration in Figure 5 provides a better

impedance match than the top configuration for designs

where 75

Ω transmission lines are connected between

the input/output pins of the IC and the resistive imped-

ance transforming networks.

Neither of the two configurations in Figure 5 provides

100% efficient voltage coupling. In the top configura-

because the output is loaded with an equivalent of

75

Ω. (The data sheet specification for output voltage

swing is based on a 150

Ω load.) In the bottom configu-

For example, a source voltage of 625mV will result in an

input voltage of 625mV for the top configuration, but

only 400mV for the bottom configuration. Also, a typical

output voltage swing of 1400mV into a differential 150

Ω

load will cause the corresponding load voltage to be

2.2nH

2.2nH

0.2pF

0.2pF

0.4pF

0.4pF

75

Ω

75

Ω

1k

ESD

STRUCTURES

DIE

PACKAGE

PARASITICS

Figure 3. MAX3752 Input Structure