256-Tap, µPoT, Low-Drift,

Digital Potentiometer

6

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Detailed Description

The MAX5402 consists of 255 fixed resistors in series

between pins H and L. The potentiometer wiper (pin W)

can be programmed to access any one of the 256 dif-

ferent tap points on the resistor string. The MAX5402

has an SPI-compatible 3-wire serial data interface to

control the wiper tap position. This write-only interface

contains three inputs: Chip Select (CS), Data In (DIN),

and Data Clock (SCLK). When CS is taken low, data

from the DIN pin is synchronously loaded into the 8-bit

serial shift register on the rising edge of each SCLK

pulse (Figure 1). The MSB is shifted in first, as shown in

Figure 3. Note that if CS is not kept low during the entire

data stream, the data will be corrupted and the device

will need to be reloaded. After all 8 data bits have been

loaded into the shift register, they are latched into the

decoder once CS is taken high. The decoder switches

the potentiometer wiper to the tap position that corre-

sponds to the 8-bit input data. Each resistor cell is

10k

Ω/255 or 39.2Ω for the MAX5402.

The MAX5402 features POR circuitry. This sets the

wiper to the midscale position at power-up by loading a

binary value of 128 into the 8-bit latch. The MAX5402

can be used as a variable resistor by connecting pin W

to either pin H or L.

POT REGISTER LOADED

1ST CLOCK PULSE

SCLK

DIN

MSB

LSB

D0

D1

D2

D3

D4

D5

D6

D7

8TH CLOCK PULSE

TIME

CS

Figure 1. Serial Interface Timing Diagram

SCLK

DIN

CS

Figure 2. Detailed Serial Interface Timing Diagram