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S19200 Datasheet(PDF) 11 Page - Seiko Instruments Inc |
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S19200 Datasheet(HTML) 11 Page - Seiko Instruments Inc |
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11 / 28 page ![]() FOR AUTOMOTIVE HIGH-WITHSTAND VOLTAGE LOW CURRENT CONSUMPTION LOW DROPOUT 105 °C OPERATION CMOS VOLTAGE REGULATOR Rev.1.2_00 S-19200 Series Seiko Instruments Inc. 11 Operation 1. Basic operation Figure 9 shows the block diagram of the S-19200 Series. The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to maintain the constant output voltage which is not influenced by the input voltage and temperature change, to the output transistor. VOUT *1 VSS VIN Rs Rf Error amplifier Current supply Vref Vfb − + Reference voltage circuit *1. Parasitic diode Figure 9 2. Output transistor In the S-19200 Series, a low on-resistance P-channel MOS FET is used as the output transistor. Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to reverse current flowing from the VOUT pin through a parasitic diode to the VIN pin, when the potential of VOUT became higher than VIN. |
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