MAX767CSLASHD datasheet(14/20 Pages) MAXIM

14 / 20 page

Proper circuit operation requires that the short-circuit

current be at least ILOAD x (1 + LIR / 2). However, the

standard application circuits are designed for a short-

circuit current slightly in excess of this amount. This

excess design current guarantees proper start-up

under constant full-load conditions and proper full-load

transient response, and is particularly necessary with

low input voltages. If the circuit will not be subjected to

full-load transients or to loads approaching the full-load

at start-up, you can decrease the short-circuit current

by increasing R1, as described in the

Current-Sense

Resistor section. This may allow use of MOSFETs with a

lower current-handling capability.

Heavy-Load Efficiency

Losses due to parasitic resistances in the switches,

coil, and sense resistor dominate at high load-current

levels. Under heavy loads, the MAX767 operates deep

in the continuous-conduction mode, where there is a

large DC offset to the inductor current (plus a small

sawtooth AC component) (see

Inductor section). This

DC current is exactly equal to the load current, a fact

which makes it easy to estimate resistive losses via the

simplifying assumption that the total inductor current is

equal to this DC offset current. The major loss mecha-

nisms under heavy loads, in usual order of importance,

are:

♦ I2R losses

♦ gate-charge losses

♦ diode-conduction losses

♦ transition losses

♦ capacitor-ESR losses

♦ losses due to the operating supply current of the IC.

Inductor-core losses, which are fairly low at heavy

loads because the AC component of the inductor cur-

rent is small, are not accounted for in this analysis.

POUT

Efficiency = ______ x 100% =

POUT

_______________ x 100%

POUT + PDTOTAL

PDTOTAL = PD(I2R) + PDGATE + PDDIODE +

PDTRAN + PDCAP + PDIC

I2R Losses

PD(I2R) = resistive loss = (ILOAD2) x

(RCOIL + rDS(ON) + R1)

where RCOIL is the DC resistance of the coil and

rDS(ON) is the drain-source on resistance of the MOS-

FET. Note that the rDS(ON) term assumes that identical

MOSFETs are employed for both the synchronous recti-

fier and high-side switch, because they time-share the

inductor current. If the MOSFETs are not identical, esti-

mate losses by averaging the two individual rDS(ON)

terms according to their duty factors: 0.66 for N1 and

0.34 for N2.

Gate-Charge Losses

PDGATE = gate driver loss = qG x f x 5V

where qG is the sum of the gate charge for low- and

high-side switches. Note that gate-charge losses are

dissipated in the IC, not the MOSFETs, and therefore

contribute to package temperature rise. For a pair of

matched MOSFETs, qG is simply twice the gate capaci-

tance of a single MOSFET (a data sheet specification).

Diode Conduction Losses

PDDIODE = diode conduction losses =

ILOAD x VD x tD x f

where VD is the forward voltage of the Schottky diode

at the output current, tD is the diode’s conduction time

(typically 110ns), and f is the switching frequency.

Transition Losses

PDTRAN = transition loss =

VIN2 x CRSS x ILOAD x f

______________________

IDRIVE

where CRSS is the reverse transfer capacitance of the

high-side MOSFET (a data sheet parameter), f is the

switching frequency, and IDRIVE is the peak current

available from the high-side gate driver output (approx-

imately 1A).

Additional switching losses are introduced by other

sources of stray capacitance at the switching node,

including the catch-diode capacitance, coil interwind-

ing capacitance, and low-side switch drain capaci-

tance, and are given as PDSW = VIN2 x CSTRAY x f, but

these are usually negligible compared to CRSS losses.

The low-side switch introduces only tiny switching loss-

es, since its drain-source voltage is already low when it

turns on.

5V-to-3.3V, Synchronous, Step-Down

Power-Supply Controller

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