PWM

FB

5k

COMP

5V

VOUT

LM5002

1

1

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¹

·

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1

1.3V

1.26V

LM5002

www.ti.com

SNVS496D – JANUARY 2007 – REVISED MARCH 2013

Enable / Standby

The LM5002 contains a dual level Enable circuit. When the EN pin voltage is below 450 mV, the IC is in a low

current shutdown mode with the VCC LDO disabled. When the EN pin voltage is raised above the shutdown

threshold but below the 1.26V standby threshold, the VCC LDO regulator is enabled, while the remainder of the

IC is disabled. When the EN pin voltage is raised above the 1.26V standby threshold, all functions are enabled

and normal operation begins. An internal 6 µA current source pulls up the EN pin to activate the IC when the EN

pin is left disconnected.

An external set-point resistor divider from VIN to GND can be used to determine the minimum operating input

range of the regulator. The divider must be designed such that the EN pin exceeds the 1.26V standby threshold

when VIN is in the desired operating range. The internal 6 µA current source should be included when

determining the resistor values. The shutdown and standby thresholds have 100 mV hysteresis to prevent noise

from toggling between modes. When the VIN voltage is below 3.5VDC during start-up and the operating

temperature is below -20°C, the EN pin should have a pull-up resistor that will provide 2 µA or greater current.

The EN pin is internally protected by a 6V Zener diode through a 1 k

Ω resistor. The enabling voltage may exceed

the Zener voltage, however the Zener current should be limited to less than 4mA.

Error Amplifier and PWM Comparator

An internal high gain error amplifier generates an error signal proportional to the difference between the

regulated output voltage and an internal precision reference. The output of the error amplifier is connected to the

COMP pin allowing the user to add loop compensation, typically a Type II network, as illustrated in Figure 16.

This network creates a low frequency pole that rolls off the high DC gain of the amplifier, which is necessary to

provides phase boost near the closed loop unity gain frequency, and a high frequency pole attenuates switching

noise. The PWM comparator compares the current sense signal from the current sense amplifier to the error

amplifier output voltage at the COMP pin.

Figure 16. Type II Compensator

When isolation between primary and secondary circuits is required, the Error Amplifier is usually disabled by

connecting the FB pin to GND. This allows the COMP pin to be driven directly by the collector of an opto-coupler.

In isolated designs the external error amplifier is located on the secondary circuit and drives the opto-coupler

LED. The compensation network is connected to the secondary side error amplifier. An example of an isolated

regulator with an opto-coupler is shown in Figure 22.

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