ISL81387 datasheet(16/27 Pages) INTERSIL

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ISL81387, ISL41387

FN6201.4

June 9, 2014

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High ESD

All pins on the ISL81387, ISL41387 include ESD protection

structures rated at ±4kV (HBM), which is good enough to survive

ESD events commonly seen during manufacturing. But the bus

pins (Tx outputs and Rx inputs) are particularly vulnerable to ESD

events because they connect to an exposed port on the exterior

of the finished product. Simply touching the port pins, or

connecting a cable, can destroy an unprotected port. ISL81387,

ISL41387 bus pins are fitted with advanced structures that

deliver ESD protection in excess of ±15kV (HBM), without

interfering with any signal in the RS-485 or the RS-232 range.

This high level of protection may eliminate the need for board

level protection, or at the very least will increase the robustness

of any board level scheme.

Small Packages

Many competing dual protocol ICs are available only in

monstrously large 24 to 28 Ld SOIC packages. The ISL81387’s

20 Ld SSOP is more than 50% smaller than even a 24 Ld SOIC,

and the ISL41387’s tiny 6mmx6mm QFN is 80% smaller than a

28 Ld SOIC.

Flow-Through Pinouts

Even the ISL81387, ISL41387 pinouts are features, in that the

“flow-through” design simplifies board layout. Having the bus

pins all on one side of the package for easy routing to a cable

connector, and the Rx outputs and Tx inputs on the other side for

easy connection to a UART, avoids costly and problematic

crossovers. Figure 10 illustrates the flow-through nature of the

pinout..

Low Power Shutdown (SHDN) Mode

The ISL81387, ISL41387 enter the SHDN mode when ON = 0, and

the Tx and Rx are disabled (DEN = 0, RXEN = 0, and RXEN = 1), and

the already low supply current drops to as low as 5µA. SHDN

disables the Tx and Rx outputs, and disables the charge pumps if

the port is in RS-232 mode, so V+ collapses to VCC, and V- collapses

to GND.

All but 5µA of SHDN ICC current is due to control input (SPB,

SLEW) pull-up resistors (~20µA/resistor), so SHDN ICC varies

depending on the ISL81387, ISL41387 configuration. The

specification tables indicate the worst case values, but careful

selection of the configuration yields lower currents. For example,

in RS-232 mode the SPB pin isn’t used, so floating it or tying it

high minimizes SHDN ICC

On the ISL41387, the SHDN ICC increases as VL decreases. VL

powers each control pin input stage and sets its VOH at VL rather

than VCC. VCC powers the second stage, but the second stage

input isn’t driven to the rail, so some ICC current flows. See

Figure 20 for details.

When enabling from SHDN in RS-232 mode, allow at least 20µs for

the charge pumps to stabilize before transmitting data. If fast

enables are required, and ICC isn’t the greatest concern, disable the

drivers with the DEN pin to keep the charge pumps active. The

charge pumps aren’t used in RS-485 mode, so the transceiver is

ready to send or receive data in less than 1µs, which is much faster

than competing devices that require the charge pump for all modes

of operation.

Internal Loopback Mode

Setting ON = 0, DEN = 1, and RXEN = 1 or RXEN = 0 (QFN only),

places the port in the loopback mode, a mode that facilitates

implementing board level self test functions. In loopback,

internal switches disconnect the Rx inputs from the Rx outputs,

and feed back the Tx outputs to the appropriate Rx output. This

way the data driven at the Tx input appears at the corresponding

Rx output (refer to “Typical Operating Circuit” on page 6). The Tx

outputs remain connected to their terminals, so the external

loads are reflected in the loopback performance. This allows the

loopback function to potentially detect some common bus faults

such as one or both driver outputs shorted to GND, or outputs

shorted together.

Note that the loopback mode uses an additional set of receivers,

as shown in “Typical Operating Circuit” on page 6. These

loopback receivers are not standards compliant, so the loopback

mode can’t be used to implement a half-duplex RS-485

transceiver. See application note AN1378 for specific details on

implementing a three pin, half duplex dual protocol port.

UART

ASIC

µCONTROLLER

ISL81387

FIGURE 10. ILLUSTRATION OF FLOW-THROUGH PINOUT

ISL81387 Datasheet(PDF) 16 Page - Intersil Corporation

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