© 1996 Microchip Technology Inc.

DS21140B-page 5

24LC41

2.1.3

BI-DIRECTIONAL MODE

The DDC Monitor Port can be switched into the bi-

directional Mode (Figure 2-3) by applying a valid high to

low transition on the bi-directional Mode Clock (DSCL).

When the device has been switched into the bi-direc-

tional Mode, the VCLK/DWP input is disregarded, with

the exception that a logic high level is required to

enable write capability. This mode supports a 2-wire bi-

directional data transmission protocol. In this protocol,

a device that sends data on the bus is defined to be the

transmitter, and a device that receives data from the

bus is defined to be the receiver. The bus must be con-

trolled by a master device that generates the bi-direc-

tional Mode Clock (DSCL), controls access to the bus

and generates the START and STOP conditions, while

the DDC Monitor Port acts as the slave. Both master

and slave can operate as transmitter or receiver, but the

master device determines which mode is activated.

2.2

Microcontroller Access Port

The Microcontroller Access Port supports a bi-direc-

tional 2-wire bus and data transmission protocol. A

device that sends data onto the bus is defined as trans-

mitter, and a device receiving data as receiver. The bus

has to be controlled by a master device which gener-

ates the serial clock (MSCL), controls the bus access,

and generates the START and STOP conditions, while

the Microcontroller Access Port works as slave. Both

master and slave can operate as transmitter or receiver,

but the master device determines which mode is acti-

vated.

FIGURE 2-3:

MODE TRANSITION

DSCL

DSDA

VCLK/DWP

Bi-Directional Mode

Transmit Only Mode