24LC41

DS21140B-page 10

© 1996 Microchip Technology Inc.

7.3

Sequential Read

Sequential reads are initiated in the same way as a ran-

dom read except that after the port transmits the first

data byte, and the master issues an acknowledge as

opposed to a stop condition in a random read. This

directs the port to transmit the next sequentially

addressed 8-bit word (Figure 7-3).

To provide sequential reads, the port contains an inter-

nal address pointer, which is incremented by one at the

completion of each operation. This address pointer

allows the entire memory contents to be serially read

during one operation.

7.4

Noise Protection

Both the DDC Monitor Port and Microcontroller Access

1.5 volts at nominal conditions.

The DSCL, MSCL, DSDA, and MSDA inputs have

Schmitt trigger and filter circuits which suppress noise

spikes to assure proper device operation even on a

noisy bus.

FIGURE 7-1:

CURRENT ADDRESS READ

FIGURE 7-2:

RANDOM READ

FIGURE 7-3:

SEQUENTIAL READ

SP

BUS ACTIVITY

MASTER

DSDA or

BUS ACTIVITY

S

T

A

R

T

CONTROL

BYTE

DATA n

A

C

K

N

O

A

C

K

S

T

O

P

MSDA LINE

S

P

S

BUS ACTIVITY

MASTER

MSDA LINE

BUS ACTIVITY

S

T

A

R

T

S

T

O

P

CONTROL

BYTE

WORD

ADDRESS (n)

DATA n

A

C

K

A

C

K

N

O

A

C

K

CONTROL

BYTE

A

C

K

S

T

A

R

T

P

DSDA or

BUS ACTIVITY

S

T

O

P

CONTROL

BYTE

DATA n

A

C

K

N

O

A

C

K

A

C

K

A

C

K

A

C

K

DATA n + 1

DATA n + 2

DATA n + X

BUS ACTIVITY

MASTER

MSDA LINE