HG

BOOT

LG

PGND

FB

SD

PWGD

FREQ

SS/TRACK

SGND

EAO

1

2

3

4

5

6

7

8

9

10

11

12

13

14

LM2744

SNVS292F – SEPTEMBER 2004 – REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

CONNECTION DIAGRAM

14-Lead TSSOP

See PW Package

PIN DESCRIPTIONS

Bootstrap pin. This is the supply rail for the high-side gate driver. When the high-side MOSFET turns on, the

BOOT (Pin 1) -

the MOSFET. See MOSFET Gate Drivers in the Application Information section for more details on how to select

MOSFETs.

Low-gate drive pin. This is the gate drive for the low-side N-channel MOSFET. This signal is interlocked with the

LG (Pin 2) -

high-side gate drive HG (Pin 14), so as to avoid shoot-through.

Power ground. This is also the ground for the low-side MOSFET driver. This pin must be connected on the PCB

PGND (Pin 3) -

ground plane, which is usually also the system ground.

Signal ground. It should be connected appropriately to the ground plane with due regard to good layout practices in

SGND (Pin 4) -

switching power regulator circuits.

Supply rail for the control sections of the IC.

PWGD (Pin 6) -

voltage source through a pull-up resistor. The voltage on this pin is thus pulled low under output fault conditions

(undervoltage or overvoltage) and also under UVLO.

Current limit threshold setting pin. This sources a fixed 40 µA current. A resistor of appropriate value should be

connected between this pin and the drain of the low-side MOSFET (switch node).

Output of the error amplifier. The voltage level on this pin is compared with an internally generated ramp signal to

EAO (Pin 8) - .

determine the duty cycle. This pin is necessary for compensating the control loop

Soft-start and tracking pin. This pin is internally connected to the non-inverting input of the error amplifier during

SS/TRACK (Pin 9) -

soft-start, and in fact any time the SS/TRACK pin voltage happens to be below the internal reference voltage. For

the basic soft-start function, a capacitor of minimum value 1nF is connected from this pin to ground. To track the

rising ramp of another power supply’s output, connect a resistor divider from the output of that supply to this pin as

described in Application Information

Feedback pin. This is the inverting input of the error amplifier, which is used for sensing the output voltage and

FB (Pin 10) -

compensating the control loop.

Frequency adjust pin. The switching frequency is set by connecting a resistor of suitable value between this pin and

FREQ (Pin 11) -

ground. The equation for calculating the exact value is provided in Application Information, but some typical values

(rounded up to the nearest standard values) are 324 k

Ω for 100 kHz, 97.6 kΩ for 300 kHz, 56.2 kΩ for 500 kHz,

24.9 k

Ω for 1 MHz.

SD (Pin 12) -

shutdown, both high-side and low-side drives are off. This pin also features a precision threshold for power supply

sequencing purposes, as well as a low threshold to ensure minimal quiescent current.

External reference. This goes to the non-inverting input of the error amplifier. Any desired reference voltage

between 0.5V to 1.5V can be connected to this pin (with appropriate filtering if necessary).

High-gate drive pin. This is the gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG

HG (Pin 14) -

(Pin 2) to avoid shoot-through.

2

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