TLE8209-2 datasheet(14/41 Pages) INFINEON

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TLE8209-2

Logic Inputs and Outputs

Data Sheet

Rev. 1.4, 2014-10-28

SCK

6.0.27

Low level

SCK_L

-0.3

–

1.0

–

6.0.28

High level

SCK_H

2.0

–

DD+0.3

–

6.0.29

Hysteresis

SCK_HYS

0.2

–

1.0

–

6.0.30

Input Current (Pull Up)

SCK

-30

-20

-10

µA

0 V <

SCK < 2.1 V

6.0.31

Input Capacity1)

CSCK

––

SS/SF

6.0.32

Low level

SS_L

-0.3

–

1.0

–

6.0.33

High level

SS_H

2.0

–

DD+0.3

–

6.0.34

Hysteresis

SS_HYS

0.2

–

1.0

–

6.0.35

Input Current in SPI

mode (Pull Up)

-30

-20

-10

µA

0 V <

SS < 2.1 V

6.0.36

-30

–

µA

2.1 V < V

SS < 3.0 V

6.0.37

µA

SS > 3.0 V

6.0.38

Input Current in SF

mode (Open Drain)

µA

SF = 5.0 V, SF inactive

6.0.39

300

–

µA

SF = 1.0 V, SF active

6.0.40

Input Capacity1)

CSS

––

6.0.41

Low level

SO_L

0.0

–

0.4

SO = 2 mA

6.0.42

High level

SO_H

DDIO-0.75 –

DDIO

SO = -2 mA

2.9 V <

DDIO < 5.5 V

6.0.43

Output capacitance1)

–

In tristate2)

6.0.44

Leakage current

-2

–

μA

In tristate

0 <

SO < VDDIO

1) Not subject to production test; specified by design

2) Vbias = 2 V; Vtest = 20 mVpp; f = 1 MHz

Electrical Characteristics: Control Inputs (cont’d)

S = 5 V to 28 V; VDD = 5.0 V; Tj = -40 ⋅C to 150 ⋅C, all voltages with respect to ground, positive current flowing

into pin (unless otherwise specified)

Pos.

Parameter

Symbol

Limit Values

Unit Test Conditions

Min.

Typ.

Max.

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