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ML6411 Datasheet(PDF) 3 Page - Micro Linear Corporation |
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ML6411 Datasheet(HTML) 3 Page - Micro Linear Corporation |
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3 / 24 page ![]() ML6411 3 PIN DESCRIPTION PIN NAME FUNCTION 1 PD When high, power downs the chip. TTL compatible 2 Clamp Gate Luma clamp gate input. Clamps to selected level when high. TTL compatible 3-10 BOUT<7:0> Either chroma bits 7 (BOUT7MSB) to 0 (BOUT0 LSB) or composite bits 7 (MSB) to 0 (LSB). TTL compatible 11 OEB Output enable for the BOUT channel. Active low. TTL compatible 12 VCC Reference voltage. Tie to Digital VCC 13 GNDO Output ground pin 14 CLK Clock input pin. TTL compatible 15 VCCO Output supply pin 16 DGND Digital ground pin 17 DVCC Digital supply pin 18 RESET Resets the control registers to nominal values. Active HIGH. TTL compatible input 19 SCLK Control Bus Clock. Address latched on rising edge, data on falling edge 20 SDAT Control data 21 REFIN Internal reference tied to REFOUT 22 REFOUT Internal reference tied to REFIN PIN NAME FUNCTION 23 OEA Output enable for the AOUT channel. Active high. TTL compatible 24-31 AOUT<7:0> Luma bit 7 (AOUT7 MSB) thru Luma bit 0 (AOUT0 LSB) outputs or Composite bit 7 (MSB) thru Composite bit 0 (LSB) outputs. TTL compatible 32 DVCC Digital supply pin 33 DGND Digital ground pin 34 NC No connection 35 AVCC1 Analog supply pin 36 Y/CV1 Y or CV (primary composite) input pin 37 AGND1 Analog ground pin 38 AVCC2 Analog supply pin 39 VINN Internal common mode bias of the A/D 40 AGND2 Analog ground pin 41 AVCC3 Analog supply pin 42 C/CV2 C (modulated chroma) or CV (2nd composite for dual channel mode) input pin 43 AGND3 Analog ground pin 44 REF1 Internal reference. Tie this pin thru 0.1uF capacitor to analog ground for proper operation |
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