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ML6680 Datasheet(PDF) 8 Page - Micro Linear Corporation |
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ML6680 Datasheet(HTML) 8 Page - Micro Linear Corporation |
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8 / 12 page ![]() ML6680 8 FUNCTIONAL DESCRIPTION Fiber Optic LED Driver The output stage of the transmitter is a current mode switch which develops the output light by sinking current from OPVCC through the LED into the OPOUT pin. Once the current requirement for the LED is determined, the RTSETOP resistor is selected. The following equation is used to select the correct RTSETOP resistor: RTSETOP = (52mA/IOUT) × 115Ω No current is provided during the off cycles of the Insertion, Bypass, or Echo Keys, or when the input signal that should be routed to the Fiber Optic LED Driver does not meet the corresponding input squelch requirements. Fiber Optic Quantizer The OPINP, OPINN input signal is fed into a limiting amplifier with a gain of about 100 and input resistance of 1.3k Ω. Maximum sensitivity is achieved through the use of a DC restoration feedback loop and AC coupling the input. When AC coupled, the input DC bias voltage is set by an on-chip network at about 1.7V. These coupling capacitors, in conjunction with the input impedance of the amplifier, establish a high pass filter with 3dB corner frequency, fL, at fL = 1/(2 × π × 1300 × C) Since the amplifier has a differential input, two capacitors of equal value are required. If the signal driving the input is single ended, one of the coupling capacitors can be tied to VCC. The internal amplifier has a lowpass filter built-in to band limit the input signal which in turn will improve the signal to noise ratio. Although the input is AC coupled, the offset voltage, VOS, within the amplifier will be present at the amplifier’s output. In order to reduce this error a DC feedback loop nulls the offset voltage, forcing VOS to be zero. The comparator is a high-speed differential zero crossing detector that slices and accurately digitizes the receive signal. The output of the comparator is fed in parallel into both the fiber optic squelch circuit and the signal MUX. The capacitor between pin VDC and QGND should be set to 500pF. Fiber Optic Squelch The ML6680 monitors the frequency and amplitude of the input from a fiberoptic receiver. The optical squelch circuit rejects signals whose frequencies are lower than 1MHz or whose amplitudes are lower than –32dBm. If both requirements are met, the LED output OPINOK goes low, and the amplitude threshold is lowered 20%. FREQUENCY OK AMPLITUDE OK SET RESET Q OPINOK Copper Pair Driver The output stage of the twisted pair transmitter is a current mode switch which develops the output voltage by driving current through the terminating resistor and the output filter. The harmonic content is controlled to simplify the filter design. The transmitter employs a center tap 2:1 transformer where the center tap is tied to VCC. While one pin of the transmit pair is pulled low, the other pin floats. The output pins to the twisted pair wires, TPOUTP and TPOUTN, can drive shielded or unshielded twisted pair cable through the appropriate isolation transformer. The output current is set by the value of RTSETTP. No transitions are generated at TPOUTP and TPOUTN when the input signal that should be routed to the Copper Pair Driver does not meet the corresponding input squelch requirements. PECL compatible output are obtained with an external network of 3 resistors. In this case the current of the output stage can be reduced by adjusting the value of RTSETTP. Twisted Pair Line Equalizer The receive equalizer compensates for twisted pair cable dispersion, which otherwise would give rise to inter-symbol interference (ISI). The amount of equalization varies with the average amplitude of the received signal. The received signal amplitude gives a rough value for the length of the attached cable. The filter/equalizer characteristic is the inverse of the cable’s dispersion characteristic. Both UTP and STP cables approximate a low-pass filter, so the filter/ equalizer approximates an inverse square root equalizer. Two external resistors and one external capacitors are required between pins EQA and EQB. The output of the equalizer is fed into the signal MUX. On a PECL application these pins should be connected between each other. Twisted Pair Squelch Circuit The twisted pair line receiver internally sets the common mode bias of the input TPINP and TPINN. Voltage offset comparators are used to set the amplitude squelch threshold, and analog timers are used to set the pulse width squelch threshold. When the input signal meets amplitude and pulse width requirements, the squelch circuit reduces the offset voltage of the comparators, decreasing the amplitude squelch threshold by half. This hysteresis allows the receiver to stay on in the presence of a fading input signal. The twisted pair squelch circuit rejects signals whose frequencies are lower than 1MHz or whose amplitudes are lower than 300mVP-P. If both requirements are met, the LED output TPINOK goes low. Clock Oscillator The ML6680 provides an on-chip clock oscillator by connecting a 32.768kHz watch crystal between pins XTAL1 and XTAL2. The part can also be driven by an external clock applied at XTAL1 and tying XTAL2 to ground. The frequency of the external clock should be between 32.7kHz and 34.5kHz. Status LED Drivers The ML6680 has three status LED drivers. The LED driver pins are active low. The LED’s are tied to their respective pins through a 300 Ω resistor to VCC. |
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