0.47 éF

10 éH

Co

Cvcc

FB

EN

SS

Vin

Linear reg

RON

Timer

Css

Regulator IC

Internal

Passives

VOUT

GND

VIN 1

2

3

4

5

6

7

LMZ14203H

SNVS692G – JANUARY 2011 – REVISED OCTOBER 2015

www.ti.com

7 Detailed Description

7.1 Overview

7.1.1 COT Control Circuit Overview

Constant ON-time control is based on a comparator and an ON-time one-shot, with the output voltage feedback

compared to an internal 0.8-V reference. If the feedback voltage is below the reference, the high-side MOSFET

ON-time is reduced with increasing input supply voltage. Following this ON-time, the high-side MOSFET remains

off for a minimum of 260 ns. If the voltage on the feedback pin falls below the reference level again the ON-time

cycle is repeated. Regulation is achieved in this manner.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Output Overvoltage Comparator

The voltage at FB is compared to a 0.92-V internal reference. If FB rises above 0.92 V the ON-time is

immediately terminated. This condition is known as overvoltage protection (OVP). It can occur if the input voltage

is increased very suddenly or if the output load is decreased very suddenly. Once OVP is activated, the top

MOSFET ON-times will be inhibited until the condition clears. Additionally, the synchronous MOSFET will remain

on until inductor current falls to zero.

7.3.2 Current Limit

Current limit detection is carried out during the OFF-time by monitoring the current in the synchronous MOSFET.

Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows

through the load, the PGND pin and the internal synchronous MOSFET. If this current exceeds 4.2 A (typical) the

current limit comparator disables the start of the next ON-time period. The next switching cycle will occur only if

the FB input is less than 0.8 V and the inductor current has decreased below 4.2 A. Inductor current is monitored

during the period of time the synchronous MOSFET is conducting. So long as inductor current exceeds 4.2 A,

further ON-time intervals for the top MOSFET will not occur. Switching frequency is lower during current limit due

to the longer OFF-time.

14

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