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TPS62360 Datasheet(PDF) 3 Page - Texas Instruments

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Part # TPS62360
Description  3A Processor Supply with I2C Compatible Interface and Remote Sense
PDF  56 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS62360 Datasheet(HTML) 3 Page - Texas Instruments

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TPS62360, TPS62361B
TPS62362, TPS62363
www.ti.com
SLVSAU9C – MAY 2011 – REVISED NOVEMBER 2012
THERMAL INFORMATION
TPS6236x
THERMAL METRIC(1)
YZH
UNITS
16 PINS
θJA
Junction-to-ambient thermal resistance(2)
94.8
θJCtop
Junction-to-case (top) thermal resistance(3)
25
θJB
Junction-to-board thermal resistance(4)
60
°C/W
ψJT
Junction-to-top characterization parameter(5)
3.2
ψJB
Junction-to-board characterization parameter(6)
57
θJCbot
Junction-to-case (bottom) thermal resistance(7)
n/a
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4)
The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5)
The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6)
The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining
θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7)
The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
RECOMMENDED OPERATING CONDITIONS
MIN
TYP
MAX
UNIT
VIN
Input voltage range, VIN
IOUT ≤ 2.5A
2.5
5.5
V
IOUT > 2.5A
3
5.5
V
IOUT,avg
Continuous output current(1)
2.5
A
trf
Rising and falling signal transition time at EN, VSELx
30
mV/µs
TA
Operating ambient temperature(2)
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(1)
The TPS6236x device is designed to provide 3A according to typical application processor load profiles. Drawing more than 2.5A
permanently might impact the device life time. See THERMAL AND DEVICE LIFE TIME INFORMATION for details.
(2)
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the
maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (
θJA), as given by the following equation: TA(max) = TJ(max) – (θJA × PD(max))
ELECTRICAL CHARACTERISTICS
Unless otherwise noted the specification applies for VIN = 3.6V over an operating ambient temp. –40°C
≤ TA ≤ 85°C; Circuit
of Parameter Measurement Information section (unless otherwise noted). Typical values are for TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
VIN
Input voltage range at VIN, AVIN
2.5
5.5
V
VDD
I2C and registers supply voltage range
1.15
3.6
V
ISD(AVIN)
Shutdown current into AVIN
EN = LOW, VDD = 0V
0.65
5
µA
TA = 25°C
0.5
1
µA
EN = LOW,
ISD(VIN)
Shutdown current into VIN
VDD = 0V
TA = 85°C
1
3
µA
ISD(VDD)
Shutdown current into VDD
EN = LOW, I2C bus idle
0.01
µA
Copyright © 2011–2012, Texas Instruments Incorporated
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Product Folder Links: TPS62360 TPS62361B TPS62362 TPS62363



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