© 2003 High Bandwidth Access, Inc. All rights reserved. Product specifications subject to change without notice.

HDV24VL

October 2003

ADP II

3HD166B

Page 7 of 7

70V24VL55I

Symbol

Parameter

Min.

Max.

Unit

Read Cycle

Read Cycle Time

55

-

MHz

Address Access Time

-

55

ns

Chip Enable Access Time

-

55

ns

Byte Enable Access Time

-

55

ns

Output Enable Access Time

-

30

ns

Output Hold from A ddress Change

3

-

ns

Output Low-Z Time

3

-

ns

Output High-Z Time

-

25

ns

Chip Enable to Power Up Time

0

-

ns

Chip Disable to Power Down Time

-

50

ns

Semaphore Flag Update Pulse

15

-

ns

Semaphore Address Access Time

-

55

ns

Write Cycle

Write Cycle Time

55

-

ns

Chip Enable to End-of-Write

45

-

ns

Address Valid to End-of-Write

45

-

ns

Address Set-up Time

0

-

ns

Write Pulse Width

40

-

ns

Write Recovery Time

0

-

ns

Data Valid to End-of-Write

30

-

ns

Output High-Z Time

-

25

ns

Data Hold Time

0

-

ns

Write Enable to Output in High-Z

-

25

ns

Output Active from End-of-Write

0

-

ns

SEM

________

Flag Write to Read T ime

5

-

ns

SEM

________

Flag Contention Window

5

-

ns

Interrupt Timing

Address Set-up Time

0

-

ns

Write Recover Time

0

-

Interrupt Set Time

-

40

ns

Interrupt Reset Time

-

40

ns

Table 5. AC Electrical Characteristics