MT8930CE datasheet(5/42 Pages) MITEL

5 / 42 page

MT8930C

9-37

Functional Description

The MT8930C Subscriber Network Interface Circuit

(SNIC) is a multifunction transceiver providing a

complete interface to the S/T Reference Point as

speciﬁed in ETS 300-012, CCITT Recommendation

I.430

and

ANSI

T1.605.

Implementing

both

point-to-point

and

point-to-multipoint

voice/data

transmission, the SNIC may be used at either end of

the digital subscriber loop. A programmable digital

interface allows the MT8930C to be conﬁgured as a

Network

Termination

(NT)

Terminal

Equipment (TE) device.

The SNIC supports 192 kbit/s (2B+D + overhead) full

duplex data transmission on a 4-wire balanced

transmission line. Transmission capability for both B

and D channels, as well as related timing and

synchronization functions, are provided on chip. The

signalling capability and

procedures necessary to

enable customer terminals (TEs) to be activated and

deactivated,

form

part

the

MT8930C’s

functionality. The SNIC handles D-channel resource

allocation and prioritization for access contention

resolution and signalling requirements in passive bus

line conﬁgurations.

Control and status information

allows implementation of maintenance functions and

monitoring of the device and the subscriber loop.

An HDLC transceiver is included on the SNIC for link

access

protocol

handling

via

the

D-channel.

Depacketized data is passed to and from the

transceiver via the microprocessor port. Two 19 byte

deep FIFOs, one for transmit and one for receive, are

provided to buffer the data. The HDLC block can be

set up to transmit or receive to/from either the

S-interface port or the ST-BUS port.

Further, the

transmit destination and receive source can be

independently selected, e.g., transmit to S-interface

while receiving from ST-BUS.

The transmit and

receive paths can be separately enabled or disabled.

Both, one and two byte address recognition is

supported by the SNIC. A transparent mode allows

data to be passed directly to the D channel without

being packetized.

A block diagram of the MT8930C is shown in Figure

The SNIC has three interface ports: a 4-wire

CCITT compatible S/T interface

(subscriber loop

interface), a 2048 kbit/s ST-BUS serial port, and a

general purpose parallel microprocessor port. This

8-bit parallel port is compatible with both Motorola or

Figure 3 - SNIC Pin Connections in Various Modes

HALF

C4bi

F0bi

F0od

DSTi

DSTo

Cmode

R/W/WR

DS/RD

AS/ALE

IRQ, NDA

VSS

VDD

VBias

LTx

LRx

STAR

Rsti

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

HALF

C4bo

F0bo

F0od

DSTi

DSTo

Cmode

R/W/WR

DS/RD

AS/ALE

IRQ, NDA

VSS

VDD

VBias

LTx

LRx

Rsto

Rsti

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

HALF

C4bi

F0bi

F0od

DSTi

DSTo

Cmode

AFT

DinB

P/SC

VSS

VDD

VBias

LTx

LRx

STAR

Rsti

M/Si

MCHo

MFRi

SYNC/BA

IS1

IS0

HALF

C4bo

F0bo

F0od

DSTi

DSTo

Cmode

PRI

DinB

P/SC

DReq

DCack

VSS

VDD

VBias

LTx

LRx

Rsto

Rsti

M/So

MCHi

MFRo

SYNC/BA

IS1

IS0

NT MODE

TE MODE

CONTROLLER MODE

CONTROLLERLESS MODE

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