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TDC-GP30 Datasheet(PDF) 49 Page - ams AG |
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TDC-GP30 Datasheet(HTML) 49 Page - ams AG |
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49 / 89 page ![]() Ultrasonic Flow Converter Vol. 1 TDC-GP30 6-4 www.acam.de DB_GP30Y_Vol1_en.docx V0.0 6.2 EEPROM Interface The EEPROM interface for an external memory extension (e.g. for backup purpose) is a separate, independent unit, integrated in the GPIO unit, which can be controlled by firmware of the integrated CPU. The EEPROM interface is a master interface suited for a single two-wire connection to an I2C compatible EEPROM in fast mode (400 k). It does not support I2C spike suppression or output slope control. E2P_SCL: Serial clock line E2P_SDA: Serial data line (bidirectional) The assignment of E2P signal lines to GPIOs can be configured by E2P_MODE in CR_PI_E2P as follows: E2P_MODE 00 01 10 11 GPIO0 *) E2P_SCL *) *) GPIO1 E2P_SDA *) *) GPIO2 *) E2P_SCL *) GPIO3 *) E2P_SDA *) GPIO4 *) GPIO5 *) *) E2P_SCL GPIO6 *) *) E2P_SDA *) as configured by GPx_DIR & GPx_SEL (see above) A 7-bit slave address of external EEPROM can be configured by E2P_ADR in CR_PI_E2P. With E2P_PU_EN in CR_PI_E2P internal pullup resistors can connected to both EEPROM signal lines. The general FW library of GP30 provide subroutines for EEPROM communication. For more details, please refer to DB_GP30Y_Firmware. |
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