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SI516 Datasheet(PDF) 1 Page - Silicon Laboratories

Part # SI516
Description  DUAL FREQUENCY VOLTAGE-CONTROLLED
PDF  22 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

SI516 Datasheet(HTML) 1 Page - Silicon Laboratories

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Rev. 1.0 6/12
Copyright © 2012 by Silicon Laboratories
Si516
D UAL F REQUENCY VOLTAGE-C ONTROLLED
C RYSTAL O SCILLATOR (VCXO) 100 k H Z TO 250 M H Z
Features
Applications
Description
The Si516 dual frequency VCXO utilizes Silicon Laboratories' advanced PLL
technology to provide any frequency from 100 kHz to 250 MHz. Unlike a
traditional VCXO where a different crystal is required for each output
frequency, the Si516 uses one fixed crystal and Silicon Labs’ proprietary
synthesizer to generate any frequency across this range. This IC-based
approach allows the crystal resonator to provide enhanced reliability,
improved mechanical robustness, and excellent stability. In addition, this
solution provides superior control voltage linearity and supply noise
rejection, improving PLL stability and simplifying low jitter PLL design in
noisy environments. The Si516 is factory-configurable for a wide variety of
user specifications, including frequency, supply voltage, output format,
tuning slope and stability. Specific configurations are factory-programmed at
time of shipment, eliminating long lead times and non-recurring engineering
charges associated with custom frequency oscillators.
Functional Block Diagram
Supports any frequency from
100 kHz to 250 MHz
Two selectable output frequencies
Low-jitter operation
Short lead times: <2 weeks
AT-cut fundamental mode crystal
ensures high reliability/low aging
High power supply noise rejection
1% control voltage linearity
Available CMOS, LVPECL,
LVDS, and HCSL outputs
Optional 1:2 CMOS fanout buffer
3.3 and 2.5 V supply options
Industry-standard 3.2 x 5.0 mm
and 5 x 7 mm package/pinouts
Pb-free/RoHS-compliant
Selectable Kv (60, 90, 120,
150 ppm/V)
SONET/SDH/OTN
PON
Low Jitter PLLs
xDSL
Broadcast video
Telecom
Switches/routers
FPGA/ASIC clock generation
Ordering Information:
See page 14.
Pin Assignments:
See page 12.
Si5602
1
2
3
6
5
4
VDD
NC
CLK
GND
FS
Vc
CMOS Dual VCXO
1
2
3
6
5
4
VDD
CLK–
CLK+
GND
FS
Vc
LVPECL/LVDS/HCSL/Dual CM O S
Dual VCXO
Si516


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