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CAP1133 Datasheet(PDF) 7 Page - Microchip Technology |
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CAP1133 Datasheet(HTML) 7 Page - Microchip Technology |
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7 / 63 page ![]() 2015 Microchip Technology Inc. DS00001625B-page 7 CAP1133 3.0 ELECTRICAL SPECIFICATIONS Note 3-1 Stresses above those listed could cause permanent damage to the device. This is a stress rating only and functional operation of the device at any other condition above those indicated in the operation sections of this specification is not implied. Note 3-2 For the 5V tolerant pins that have a pull-up resistor, the voltage difference between V5VT_PIN and VDD must never exceed 3.6V. Note 3-3 The Package Power Dissipation specification assumes a recommended thermal via design consisting of a 2x2 matrix of 0.3mm (12mil) vias at 1.0mm pitch connected to the ground plane with a 1.6 x 2.3mm thermal landing. TABLE 3-1: ABSOLUTE MAXIMUM RATINGS Voltage on 5V tolerant pins (V5VT_PIN) -0.3 to 5.5 V Voltage on 5V tolerant pins (|V5VT_PIN - VDD|) Note 3-2 0 to 3.6 V Voltage on VDD pin -0.3 to 4 V Voltage on any other pin to GND -0.3 to VDD + 0.3 V Package Power Dissipation up to TA = 85°C for 10 pin DFN (see Note 3-3) 0.7 W Junction to Ambient ( θJA) 77.7 °C/W Operating Ambient Temperature Range -40 to 125 °C Storage Temperature Range -55 to 150 °C ESD Rating, All Pins, HBM 8000 V |
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