ADS4449 datasheet(36/56 Pages) TI1

36 / 56 page

ADS4449

SBAS603A – APRIL 2013 – REVISED JANUARY 2016

www.ti.com

8.6.1.13 Register Address Ach (Default = 00h)

ALWAYS

CLOCKOUT DELAY PROG CH CD

WRITE 1

Bit 7

Always write 0

Bits 6-4

CLOCKOUT DELAY PROG CH CD

These bits program the clock out delay for channels C and D, as shown in Table 5.

Bits 2-1

Always write 0

Bit 0

Always write 1

This bit is set to 0 by default. User must set it to 1 after reset or power-up.

Table 5. Clockout Delay Programmability For All Channels

CLOCKOUT DELAY PROG CHxx

DELAY (ps)

0000 (default)

0 (default)

0001

–30

0010

0011

0100

–150

0101

–180

0110

–70

0111

–110

1000

270

1001

230

1010

340

1011

300

1100

140

1101

110

1110

200

1111

170

8.6.1.14 Register Address C3h (Default = 00h)

FAST OVR THRESH PROG

Bits 7-0

FAST OVR THRESH PROG

The device has a fast OVR mode that indicates an overload condition at the ADC input.

The input voltage level at which the overload is detected is referred to as the threshold

and is programmable using the FAST OVR THRESH PROG bits.

FAST OVR is triggered seven output clock cycles after the overload condition occurs. To

enable the FAST OVR programmability, enable the EN FAST OVR THRESH register bit.

The threshold at which fast OVR is triggered is (full-scale × [the decimal value of the

FAST OVR THRESH PROG bits] / 255).

After reset, when EN FAST OVR THRESH PROG is set, the default value of the FAST

OVR THRESH PROG bits is 230 (decimal).

Submit Documentation Feedback

Product Folder Links: ADS4449

ADS4449 Datasheet(PDF) 36 Page - Texas Instruments

ADS4449 Datasheet(HTML) 36 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56

Datasheet Download

Link URL