FDC2114RGHT datasheet(30/60 Pages) TI1

30 / 60 page

FDC2212, FDC2214, FDC2112, FDC2114

SNOSCZ5A – JUNE 2015 – REVISED JUNE 2015

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9.6.22 Address 0x14, CLOCK_DIVIDERS_CH0

Figure 39. Address 0x14, CLOCK_DIVIDERS_CH0

RESERVED

CH0_FIN_SEL

RESERVED

CH0_FREF_DIVIDER

Table 32. Address 0x14, CLOCK_DIVIDERS_CH0 Field Descriptions

Bit

Field

Type

Reset

Description

15:14

RESERVED

R/W

Reserved. Set to b00.

Channel 0 Sensor frequency select

for differential sensor configuration:

b01: divide by 1. Choose for sensor frequencies between

0.01MHz and 8.75MHz

13:12

CH0_FIN_SEL

R/W

b10: divide by 2. Choose for sensor frequencies between 5MHz

and 10MHz

for single-ended sensor configuration:

b10: divide by 2. Choose for sensor frequencies between

0.01MHz and 10MHz

11:10

RESERVED

R/W

Reserved. Set to b00.

00 0000

Channel 0 Reference Divider Sets the divider for Channel 0

0000

reference. Use this to scale the maximum conversion frequency.

9:0

CH0_FREF_DIVIDER

R/W

b00’0000’0000: Reserved. Do not use.

CH0_FREF_DIVIDER

≥b00’0000’0001: fREF0 =

fCLK/CH0_FREF_DIVIDER

9.6.23 Address 0x15, CLOCK_DIVIDERS_CH1

Figure 40. Address 0x15, CLOCK_DIVIDERS_CH1

RESERVED

CH1_FIN_SEL

RESERVED

CH1_FREF_DIVIDER

Table 33. Address 0x15, CLOCK_DIVIDERS_CH1 Field Descriptions

Bit

Field

Type

Reset

Description

15:14

RESERVED

R/W

Reserved. Set to b00.

0000

Channel 1 Sensor frequency select

for differential sensor configuration:

b01: divide by 1. Choose for sensor frequencies between

0.01MHz and 8.75MHz

13:12

CH1_FIN_SEL

R/W

b10: divide by 2. Choose for sensor frequencies between 5MHz

and 10MHz

for single-ended sensor configuration:

b10: divide by 2. Choose for sensor frequencies between

0.01MHz and 10MHz

11:10

RESERVED

R/W

Reserved. Set to b00.

00 0000

Channel 1 Reference Divider Sets the divider for Channel 1

0000

reference. Use this to scale the maximum conversion frequency.

9:0

CH1_FREF_DIVIDER

R/W

b00’0000’0000: Reserved. Do not use.

CH1_FREF_DIVIDER

≥ b00’0000’0001: fREF1 =

fCLK/CH1_FREF_DIVIDER

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