| Electronic Components Datasheet Search |
|
SPC560D30L3 Datasheet(PDF) 53 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
SPC560D30L3 Datasheet(HTML) 53 Page - STMicroelectronics |
|
53 / 90 page ![]() SPC560D30x, SPC56040Dx Electrical characteristics Doc ID 16315 Rev 7 53/90 4.12.3 Absolute maximum ratings (electrical sensitivity) Based on two different tests (ESD and LU) using specific measurement methods, the product is stressed in order to determine its performance in terms of electrical sensitivity. Electrostatic discharge (ESD) Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of each sample according to each pin combination. The sample size depends on the number of supply pins in the device (3 parts × (n + 1) supply pin). This test conforms to the AEC-Q100-002/-003/-011 standard. For more details, refer to the application note Electrostatic Discharge Sensitivity Measurement (AN1181). Table 33. EMI radiated emission measurement(1)(2) Symbol C Parameter Conditions Value Unit Min Typ Max — SR — Scan range — 0.150 — 1000 MHz fCPU SR — Operating frequency — — 48 — MHz VDD_LV SR — LV operating voltages — — 1.28 — V SEMI CC T Peak level VDD = 5V, TA =25°C, LQFP100 package Test conforming to IEC 61967-2, fOSC = 8 MHz/fCPU = 48 MHz No PLL frequency modulation — — 18 dBµV ± 2% PLL frequency modulation — — 14 dBµV 1. EMI testing and I/O port waveforms per IEC 61967-1, -2, -4 2. For information on conducted emission and susceptibility measurement (norm IEC 61967-4), please contact your local marketing representative. Table 34. ESD absolute maximum ratings(1) (2) Symbol C Ratings Conditions Class Max value Unit VESD(HBM) C C T Electrostatic discharge voltage (Human Body Model) TA = 25 °C conforming to AEC-Q100-002 H1C 2000 V VESD(MM) C C T Electrostatic discharge voltage (Machine Model) TA = 25 °C conforming to AEC-Q100-003 M2 200 V VESD(CDM) C C T Electrostatic discharge voltage (Charged Device Model) TA = 25 °C conforming to AEC-Q100-011 C3A 500 V 750 (corners) V 1. All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. 2. A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |