SPC560D30L3 datasheet(46/90 Pages) STMICROELECTRONICS

46 / 90 page

Electrical characteristics

SPC560D30x, SPC56040Dx

46/90

Doc ID 16315 Rev 7

Table 24.

Voltage regulator electrical characteristics

Symbol

Parameter

Conditions(1)

Value

Unit

Min

Typ

Max

CREGn

SR —

Internal voltage regulator external

capacitance

—

200

—

500

RREG

SR —

Stability capacitor equivalent serial

resistance

Range:

10 kHz to 20 MHz

——

0.2



CDEC1

SR — Decoupling capacitance(2) ballast

VDD_BV/VSS_LV pair:

VDD_BV = 4.5 V to 5.5 V

100(3)

470(4)

—

VDD_BV/VSS_LV pair:

VDD_BV = 3V to 3.6V

400

—

CDEC2

SR —

Decoupling capacitance regulator

supply

VDD/VSS pair

100

—

VMREG

Main regulator output voltage

Before exiting from reset

—

1.32

—

After trimming

1.16

1.28

—

IMREG

SR —

Main regulator current provided to

VDD_LV domain

——

—

150

IMREGINT CC D

Main regulator module current

consumption

IMREG = 200 mA

—

IMREG = 0 mA

—

VLPREG

CC P Low-power regulator output voltage

After trimming

1.16

1.28

—

ILPREG

SR —

Low power regulator current provided

to VDD_LV domain

——

—

ILPREGINT CC

Low-power regulator module current

consumption

ILPREG = 15 mA;

TA = 55 °C

——

600

µA

—

ILPREG = 0 mA;

TA = 55 °C

—

VULPREG CC P

Ultra low power regulator output

voltage

After trimming

1.16

1.28

—

IULPREG

SR —

Ultra low power regulator current

provided to VDD_LV domain

——

—

IULPREGINT CC D

Ultra low power regulator module

current consumption

IULPREG = 5 mA;

TA = 55 °C

——

100

µA

IULPREG = 0 mA;

TA = 55 °C

—

IDD_BV

CC D

In-rush average current on VDD_BV

during power-up(5)

——

—

300(6)

VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified.

This capacitance value is driven by the constraints of the external voltage regulator supplying the VDD_BV voltage. A typical

value is in the range of 470 nF.

This value is acceptable to guarantee operation from 4.5 V to 5.5 V.

External regulator and capacitance circuitry must be capable of providing IDD_BV while maintaining supply VDD_BV in

operating range.

In-rush average current is seen only for short time during power-up and on standby exit (maximum 20 µs, depending on

external capacitances to be loaded).

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