ATMEGA323 datasheet(5/247 Pages) ATMEL

5 / 247 page

ATmega323(L)

1457G–AVR–09/03

Port B (PB7..PB0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port B output buffers can sink 20 mA. As inputs, Port B pins that are externally

pulled low will source current if the pull-up resistors are activated. The Port B pins are

tri-stated when a reset condition becomes active, even if the clock is not running.

Port B also serves the functions of various special features of the ATmega323 as listed

on page 139.

Port C (PC7..PC0)

Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each

bit). The Port C output buffers can sink 20 mA. As inputs, Port C pins that are externally

pulled low will source current if the pull-up resistors are activated. The Port C pins are

tri-stated when a reset condition becomes active, even if the clock is not running.

Port C also serves the functions of the JTAG interface and other special features of the

ATmega323 as listed on page 146. If the JTAG interface is enabled, the pull-up resistors

on pins PC5 (TDI), PC3 (TMS) and PC2 (TCK) will be activated even if a Reset occurs.

Port D (PD7..PD0)

Port D is an 8-bit bidirectional I/O port with internal pull-up resistors (selected for each

bit). The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally

pulled low will source current if the pull-up resistors are activated. The Port D pins are

tri-stated when a reset condition becomes active, even if the clock is not running.

Port D also serves the functions of various special features of the ATmega323 as listed

on page 151.

RESET

Reset input. A low level on this pin for more than 500 ns will generate a Reset, even if

the clock is not running. Shorter pulses are not guaranteed to generate a Reset.

XTAL1

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

XTAL2

Output from the inverting Oscillator amplifier.

AVCC

AVCC is the supply voltage pin for Port A and the A/D Converter. It should be externally

connected to V

CC, even if the ADC is not used. If the ADC is used, it should be con-

nected to V

CC through a low-pass filter. See page 127 for details on operation of the

ADC.

AREF

AREF is the analog reference pin for the A/D Converter. For ADC operations, a voltage

in the range 2.56V to AVCC can be applied to this pin.

AGND

Analog ground. If the board has a separate analog ground plane, this pin should be con-

nected to this ground plane. Otherwise, connect to GND.

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