ATMEGA323 datasheet(68/247 Pages) ATMEL

68 / 247 page

ATmega323(L)

1457G–AVR–09/03

The user should poll the EEWE bit before starting the read operation. If a write operation

is in progress, it is not possible to set the EERE bit, nor to change the EEAR Register.

The calibrated Oscillator is used to time the EEPROM accesses. Table 25 lists the typi-

cal programming time for EEPROM access from the CPU.

Preventing EEPROM

Corruption

During periods of low V

CC, the EEPROM data can be corrupted because the supply volt-

age is too low for the CPU and the EEPROM to operate properly. These issues are the

same as for board level systems using the EEPROM, and the same design solutions

should be applied.

An EEPROM data corruption can be caused by two situations when the voltage is too

low. First, a regular write sequence to the EEPROM requires a minimum voltage to

operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the

supply voltage for executing instructions is too low.

EEPROM data corruption can easily be avoided by following these design recommen-

dations (one is sufficient):

Keep the AVR RESET active (low) during periods of insufficient power sup-

ply voltage. This can be done by enabling the internal Brown-out Detector

(BOD) if the operating voltage matches the detection level. If not, an external

low V

CC Reset Protection circuit can be used. If a Reset occurs while a write

operation is in progress, the write operation will be completed provided that

the power supply is voltage is sufficient.

Keep the AVR core in Power-down sleep mode during periods of low V

CC.

This will prevent the CPU from attempting to decode and execute instruc-

tions, effectively protecting the EEPROM Registers from unintentional writes.

Store constants in Flash memory if the ability to change memory contents

from software is not required. Flash memory can not be updated by the CPU

unless the Boot Loader software supports writing to the Flash and the Boot

Lock bits are configured so that writing to the Flash memory from CPU is

allowed. See “Boot Loader Support” on page 177 for details.

Table 25. EEPROM Programming Time.

Symbol

Number of Calibrated

RC Oscillator Cycles

Min Programming

Time

Max Programming

Time

EEPROM write (from

CPU)

2048

1.9 ms

3.8 ms

ATMEGA323 Datasheet(PDF) 68 Page - ATMEL Corporation

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