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ADG5436F Datasheet(PDF) 13 Page - Analog Devices

Part # ADG5436F
Description  Fault Protection and Detection, 10 ohm RON, Dual SPDT Switch
PDF  30 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADG5436F Datasheet(HTML) 13 Page - Analog Devices

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Data Sheet
ADG5436F
Rev. B | Page 13 of 30
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 2. TSSOP Pin Configuration
Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic
Description
1
15
IN1/F1
Logic Control Input 1 (IN1). See Table 8.
Decoder Pin (F1). This pin is used together with the specific fault pin (SF) to indicate which input is in
a fault condition. See Table 9.
2
16
S1A
Overvoltage Protected Source Terminal 1A. This pin can be an input or output.
3
1
D1
Drain Terminal 1. This pin can be an input or output.
4
2
S1B
Overvoltage Protected Source Terminal 1B. This pin can be an input or output.
5
3
VSS
Most Negative Power Supply Potential.
6
4
GND
Ground (0 V) Reference.
7
7
NIC
No Internal Connection.
8
5
DR
Drain Response Digital Input. Tying this pin to GND enables the drain to pull to VDD or VSS during an
overvoltage fault condition. The default condition of the drain is open-circuit when the pin is left
floating or if it is tied to VDD.
9
6
IN2/F2
Logic Control Input 2 (IN2). See Table 8.
Decoder Pin (F2). This pin is used together with the specific fault pin (SF) to indicate which input is in
a fault condition. See Table 9.
10
8
S2A
Overvoltage Protected Source Terminal 2A. This pin can be an input or output.
11
9
D2
Drain Terminal 2. This pin can be an input or output.
12
10
S2B
Overvoltage Protected Source Terminal 2B. This pin can be an input or output.
13
11
VDD
Most Positive Power Supply Potential.
14
12
EN
Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When
this pin is high, the INx logic inputs determine the on switches.
15
13
FF
Fault Flag Digital Output. This pin has a high output when the device is in normal operation or a low
output when a fault condition occurs on any of the Sxx inputs. The FF pin has a weak internal pull-up
that allows the signals to be combined into a single interrupt for larger modules that contain
multiple devices.
16
14
SF
Specific Fault Digital Output. This pin has a high output when the device is in normal operation, or a
low output when a fault condition is detected on a specific pin, depending on the state of F1 and F2
per Table 9.
EP
Exposed Pad
The exposed pad is connected internally. For increased reliability of the solder joints and maximum
thermal capability, it is recommended that the pad be soldered to the lowest supply voltage, VSS.
1
2
3
4
5
6
7
8
NOTES
1. NIC = NO INTERNAL CONNECTION.
16
15
14
13
12
11
10
9
S1A
D1
S1B
NIC
GND
VSS
IN1/F1
FF
EN
VDD
S2A
DR
IN2/F2
D2
S2B
SF
ADG5436F
(Not to Scale)
TOP VIEW
12
11
10
1
3
4
9
2
NOTES
1. NIC = NO INTERNAL CONNECTION.
2. THE EXPOSED PAD IS INTERNALLY CONNECTED. FOR
INCREASED RELIABILITY OF THE SOLDER JOINTS AND
MAXIMUM THERMAL CAPABILITY, IT IS RECOMMENDED
THAT THE PAD BE CONNECTED TO THE LOWEST
SUPPLY VOLTAGE, VSS.
D1
S1B
VSS
GND
EN
VDD
S2B
D2
ADG5436F
TOP VIEW
(Not to Scale)



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