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Date:5/25/04

SP6652 1A, High Efficiency, High Frequency Current Mode PWM Buck Regulator

© Copyright 2004 Sipex Corporation

Voltage Loop and Compensation

in PWM Mode

The voltage loop section of the circuit consists

of the error amplifier and the translator circuits

(see functional diagram). The input of the volt-

age loop is the 0.75V reference voltage minus

the divided down output voltage at the feedback

pin. The output of the error amplifier is trans-

lated from a ground referred signal (the COMP

node) to a power input voltage referred signal.

The output of the voltage loop is fed to the

positive terminal of the Current Loop compara-

tor, and represents the peak inductor current

necessary to close the loop.

The total power supply loop is compensated

with a series RC network connected from the

COMP pin to ground. Compensation is simple

due to current-mode control. The modulator has

two dominant poles: one at a low frequency, and

one above the crossover frequency of the loop,

as seen in the graph below, Linearized Modula-

tor Frequency Response vs. Inductor Value.

The low frequency pole for L1=5

µH is 4kHz,

the second pole is 500kHz, and the gain-band-

width is 20kHz. The total loop crossover fre-

the clock frequency. This sets the 2nd modula-

tor pole at 2.5 times the crossover frequency.

Therefore the gain of the error amplifier can be

200kHz/20kHz = 10 at the first modulator pole

of 4kHz. The error amp transconductance is

1mS, so this sets the RZ resistor value in the

compensation network at 10/1mS = 10k

Ω. The

zero frequency is placed at the first pole to

provide at total system response of -20dB/de-

cade (the zero from the error amp cancels the

first modulator pole, leaving the 1 pole rolloff

from the error amp pole). The compensation

capacitor becomes:

Cc = 1/(2*

π*Rz*pole1) = 1/(6.28*10kΩ*4kHz)

= 4nF

DETAIL DESCRIPTION: Contunued

L1VAL

2u

3u

4u

5u

6u

7u

8u

9u

10u

Mod_pole1

Mod_pole2

Gbw_modfb

0

4K

8K

12K

16K

20K

1

0

0.4M

0.8M

1.2M

1.6M

2.0M

2

0

10K

20K

30K

40K

50K

3

>>

1

2

3

Conditions: V

2µH to 10µH

Linearized Modulator Frequency Response vs. Inductor Value.