UVLO

LEVEL

SHIFT

DRIVER

DRIVER

UVLO

HB

HO

HS

VDD

LO

GND

HI

LI

LM5100A, LM5100B, LM5100C

LM5101A, LM5101B, LM5101C

SNOSAW2Q – SEPTEMBER 2006 – REVISED NOVEMBER 2015

www.ti.com

8 Detailed Description

8.1 Overview

The LM5100A/B/C and LM5101A/B/C are designed to drive both the high-side and the low-side N-channel FETs

in a synchronous buck or a half-bridge configuration. The outputs are independently controlled with CMOS input

thresholds(LM5101A/B/C) or TTL input thresholds(LM5101A/B/C). The floating high-side driver is capable of

working with supply voltages up to 100 V. An integrated high voltage diode is provided to charge high side gate

drive bootstrap capacitor. A robust level shifter operates at high speed while consuming low power and providing

clean level transitions from the control logic to the high side gate driver. Under-voltage lockout is provided on

both the low side and the high side power rails.

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Start-up and UVLO

Both high and low-side drivers include under voltage lockout (UVLO) protection circuitry which monitors the

driver until sufficient supply voltage is available to turn on the external MOSFETs, and the built-in UVLO

exceeds the UVLO threshold, typically about 6.6 V. Any UVLO condition on the bootstrap capacitor will disable

only the high-side output (HO).

8.3.2 Level Shift

The level shift circuit is the interface from the high-side input to the high-side driver stage which is referenced to

the switch node (HS). The level shift allows control of the HO output referenced to the HS pin and provides

excellent delay matching with the low-side driver.

14

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