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ADC0833 Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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ADC0833 Datasheet(HTML) 9 Page - National Semiconductor (TI) |
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9 / 20 page ![]() Timing Diagram TLH5607 – 5 Functional Description 10 MULTIPLEXER ADDRESSING The design of the ADC0833 utilizes a sample-data compar- ator structure which provides for a differential analog input to be converted by a successive approximation routine The actual voltage converted is always the difference be- tween an assigned ‘‘a’’ input terminal and a ‘‘b’’ input ter- minal The polarity of each input terminal of the pair being converted indicates which line the converter expects to be the most positive If the assigned ‘‘a’’ input is less than the ‘‘b’’ input the converter responds with an all zeros output code A unique input multiplexing scheme has been utilized to pro- vide multiple analog channels with software-configurable single-ended (ground referred) or differential inputs The an- alog signal conditioning required in transducer-based data acquisition systems is significantly simplified with this type of input flexibility One converter package can now handle ground referenced inputs and true differential inputs A particular input configuration is assigned during the MUX addressing sequence prior to the start of a conversion The MUX address selects which of the analog inputs are to be enabled and whether this input is single-ended or differen- tial In the differential case it also assigns the polarity of the channels Differential inputs are restricted to adjacent chan- nel pairs For example channel 0 and channel 1 may be selected as a differential pair Channel 0 or 1 cannot act differentially with any other channel In addition to selecting differential mode the sign may also be selected Channel 0 may be selected as the positive input and channel 1 as the negative input or vice versa This programmability is best illustrated by the MUX addressing codes shown in the fol- lowing table The MUX address is shifted into the converter through the DI line TABLE I MUX Addressing Single-Ended MUX Mode Address Channel SGL ODD SELECT 0123 DIF SIGN 10 10 0 1 a 10 1 1 a 11 0 1 a 11 1 1 a COM is internally ties to a GND Differential MUX Mode Address Channel SGL ODD SELECT 0123 DIF SIGN 10 00 0 1 ab 00 1 1 ab 01 0 1 ba 01 1 1 ba 9 |
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