| Electronic Components Datasheet Search |
|
ADC08351 Datasheet(PDF) 2 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
ADC08351 Datasheet(HTML) 2 Page - National Semiconductor (TI) |
|
2 / 15 page ![]() ADC08351 Block Diagram Pin Descriptions and Equivalent Circuits Pin No. Symbol Equivalent Circuit Description 17 V IN Analog signal input. Conversion range is 0.5 V P-P to 0.68 V A. 14 V REF Positive reference voltage input. Operating range of this voltage is 0.75V to V A. This pin should be bypassed with a 10 µF tantalum or aluminum electrolytic capacitor and a 0.1 µF ceramic chip capacitor. 1OE CMOS/TTL compatible digital input that, when low, enables the digital outputs of the ADC08351. When high, the outputs are in a high impedance state. 12 CLK CMOS/TTL compatible digital clock input. V IN is sampled on the falling edge of CLK input. 15 PD CMOS/TTL compatible digital input that, when high, puts the ADC08351 into the power down mode, where it consumes minimal power. When this pin is low, the ADC08351 is in the normal operating mode. 3 thru 10 D0–D7 Conversion data digital output pins. D0 is the LSB, D7 is the MSB. Valid data is output just after the rising edge of the CLK input. These pins are enabled by bringing the OE pin low. DS100895-2 www.national.com 2 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |