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PI6LC4820 Datasheet(PDF) 5 Page - Pericom Semiconductor Corporation |
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PI6LC4820 Datasheet(HTML) 5 Page - Pericom Semiconductor Corporation |
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5 / 13 page ![]() 5 PI6LC4820 Rev D 11/13/13 PI6LC4820 HiFlexTM Ethernet Network Clock Generator Bank A Output Control QA_Mode0 QA[2:0] QA_Mode1 QA[4:3] 0 LVDS 0 LVDS 1 LVPECL 1 LVPECL NC Hi-Z NC Hi-Z Bank B Output Control QB_Mode QB[2:0] 0 LVDS 1 LVPECL NC Hi-Z C-bank Output Interface Control Configuration QC_Mode QC+/- 0 LVDS 1 LVPECL NC Hi-Z Output Frequency Control Table FS_A FS_B FS_C Output Frequency 0 0 0 156.25 1 1 1 125 NC NC NC 312.5 PLL Feedback Divider Control Table FS1 Feedback Divider Ratio 0 25 1 20 13-0167 |
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