ADC12281 datasheet(3/16 Pages) NSC

3 / 16 page

Pin Descriptions and Equivalent Circuits (Continued)

Symbol

Equivalent Circuit

Description

Positive reference bypass pin. Bypass with a 0.1 µF

capacitor. Do not connect anything else to this pin.

See Section 3.1.

Reference midpoint bypass pin. Bypass with a

0.1 µF capacitor. Do not connect anything else to

this pin. See Section 3.1.

Negative reference bypass pin. Bypass with a

0.1 µF capacitor. Do not connect anything else to

this pin. See Section 3.1.

CLOCK

Sample clock input, TTL compatible. Amplitude

should not exceed 3 V

P-P.

CAL

Calibration request, active High. Calibration cycle

starts when CAL returns to logic low. CAL is

ignored during power-down mode. See Section 2.2.

7PD

Power-down, active High, ignored during calibration

cycle. See paragraph 2.4.

Output enable control, active low. When this pin is

high the data outputs are in TRI-STATE®

(high-impedance) mode.

Over-range indicator. This pin is at a logic High, for

IN < 0 or for VIN > VREF.

READY

Device ready indicator, active High. This pin will be

at a logic Low during a calibration cycle and while

the device is in the power down mode.

14–19,

22–27

D0–D11

Digital output word, CMOS compatible. D0 (pin 19)

is LSB, D11 (pin 36) is MSB. Load with no more

than 25 pF.

ADC12281 Datasheet(PDF) 3 Page - National Semiconductor (TI)