6.0 COMMON APPLICATION PITFALLS

Driving the inputs (analog or digital) beyond the power

supply rails. For proper operation, all inputs should not go

more than 100 mV beyond the supply rails (more than

100 mV below the ground pins or 100 mV above the supply

pins). Exceeding these limits on even a transient basis may

cause faulty or erratic operation. It is not uncommon for high

speed digital circuits (e.g., 74F and 74AC devices) to exhibit

overshoot or undershoot that goes above the power supply

or more than a volt below ground. A resistor of about 50

Ω to

100

Ω in series with the offending digital input will eliminate

the problem.

Do not allow input voltages to exceed the supply voltage

during power up.

Be careful not to overdrive the inputs of the ADC12281 with

a device that is powered from supplies outside the range of

the ADC12281 supply. Such practice may lead to conversion

inaccuracies and even to device damage.

Attempting to drive a high capacitance digital data bus.

The more capacitance the output drivers must charge for

each conversion, the more instantaneous digital current

flows through V

current spikes can couple into the analog circuitry, degrading

dynamic performance. Adequate bypassing and maintaining

separate analog and digital ground planes will reduce this

problem. The digital data outputs should be buffered (with

74ACQ541, for example). Dynamic performance can also be

improved by adding series resistors at each digital output,

close to the ADC12281, which reduces the energy coupled

back into the converter output pins by limiting the output

current. A reasonable value for these resistors is 47

Ω.

Using an inadequate amplifier to drive the analog input.

As explained in Section 1.2, the capacitance seen at the

input alternates between 12 pF and 28 pF, depending upon

the phase of the clock. This dynamic load is more difficult to

drive than is a fixed capacitance.

If the amplifier exhibits overshoot, ringing, or any evidence of

instability, even at a very low level, it will degrade perfor-

mance. The CLC409 has been found to be a good amplifier

to drive the ADC12281. A small series resistor at the ampli-

fier output, followed by a capacitor to ground (as shown in

Figure 5), will improve performance.

Operating with the reference pins outside of the speci-

fied range. As mentioned in Section 1.1, V

the range of 1.8V

≤ V

REF

≤ 2.2V. Operating outside of these

limits could lead to output distortion.

Using a clock source with excessive jitter, using exces-

sively long clock signal trace, or having other signals

coupled to the clock signal trace. This will cause the

sampling interval to vary, causing excessive output noise

and a reduction in SNR and SINAD performance.

10102729

FIGURE 6. Example of a Suitable Layout

www.national.com

15