TAS5751M datasheet(21/70 Pages) TI1

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TAS5751M

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SLASEC1A – MARCH 2016 – REVISED MARCH 2016

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7.4.6 SSTIMER Pin Functionality

The SSTIMER pin uses a capacitor connected between this pin and ground to control the output duty cycle when

exiting all-channel shutdown. The capacitor on the SSTIMER pin is slowly charged through an internal current

source, and the charge time determines the rate at which the output transitions from a near-zero duty cycle to the

desired duty cycle. This allows for a smooth transition that minimizes audible pops and clicks. When the part is

shut down, the drivers are placed in the high-impedance state and transition slowly down through an internal 3-

Ω resistor, similarly minimizing pops and clicks. The shutdown transition time is independent of the SSTIMER

pin capacitance. Larger capacitors increase the start-up time, while smaller capacitors decrease the start-up

time. The SSTIMER pin can be left floating for BD modulation.

7.4.7 Device Protection System

7.4.7.1 Overcurrent (OC) Protection With Current Limiting

The TAS5751M device has independent, fast-reacting current detectors on all high-side and low-side power-

stage FETs. The detector outputs are closely monitored to prevent the output current from increasing beyond the

overcurrent threshold defined in the Protection Characteristics table.

If the output current increases beyond the overcurrent threshold, the device shuts down and the outputs

transition to the off or high impedance (Hi-Z) state. The device returns to normal operation once the fault

condition (i.e., a short circuit on the output) is removed. Current-limiting and overcurrent protection are not

independent for half-bridges. That is, if the bridge-tied load between half-bridges A and B causes an overcurrent

fault, half-bridges A, B, C, and D shut down.

7.4.7.2 Overtemperature Protection

The TAS5751M device has an overtemperature-protection system. If the device junction temperature exceeds

150°C (nominal), the device enters thermal shutdown, where all half-bridge outputs enter the high-impedance

(Hi-Z) state, and ADR/FAULT asserts low if the device is configured to function as a fault output. The TAS5751M

device recovers automatically once the junction temperature of the device drops approximately 30°C.

7.4.7.3 Undervoltage Protection (UVP) and Power-On Reset (POR)

The UVP and POR circuits of the TAS5751M device fully protect the device in any power-up/down and brownout

situation. While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are

fully operational when the PVDD and AVDD supply voltages reach 7.6 V and 2.7 V, respectively. Although PVDD

and AVDD are independently monitored. For PVDD, if the supply voltage drops below the UVP threshold, the

protection feature immediately sets all half-bridge outputs to the high-impedance (Hi-Z) state and asserts

ADR/FAULT low.

7.5 Device Functional Modes

The TAS5751M device is a digital input class-d amplifier with audio processing capabilities. The TAS5751M

device has numerous modes to configure and control the device.

7.5.1 Serial Audio Port Operating Modes

The serial audio port in the TAS5751M device supports industry-standard audio data formats, including I²S, Left-

justified(LJ) and Right-justified(RJ) formats. To select the data format that will be used with the device can

controlled by using the serial data interface registers 0x04. The default is 24bit, I²S mode. The timing diagrams

for the various serial audio port are shown in the Serial Interface Control and Timing section

7.5.2 Communication Port Operating Modes

The TAS5751M device is configured via an I²C communication port. The I²C communication protocol is detailed

in the 7.7 I²C Serial Control Port Requirements and Specifications section.

TAS5751M Datasheet(PDF) 21 Page - Texas Instruments

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