TAS5751M datasheet(6/70 Pages) TI1

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TAS5751M

SLASEC1A – MARCH 2016 – REVISED MARCH 2016

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(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-

standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(4)

The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(5)

The junction-to-top characterization parameter,

ψJT, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).

(6)

The junction-to-board characterization parameter,

ψJB, estimates the junction temperature of a device in a real system and is extracted

from the simulation data for obtaining RθJA, using a procedure described in JESD51-2a (sections 6 and 7).

(7)

The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific

JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

Spacer

6.4 Thermal Characteristics

THERMAL METRIC(1)

DCA (48 PINS)

UNITS

Special Test

Case

JEDEC

Standard 2-

Layer PCB

JEDEC

Standard 4-

Layer PCB

TAS5751MEVM

θJA

Junction-to-ambient thermal resistance(2)

49.9

26.2

24.0

°C/W

θJCtop

Junction-to-case (top) thermal resistance(3)

14.9

°C/W

θJB

Junction-to-board thermal resistance(4)

6.9

°C/W

ψJT

Junction-to-top characterization parameter(5)

1.1

0.8

0.7

°C/W

ψJB

Junction-to-board characterization parameter(6)

10.8

6.8

1.7

°C/W

θJCbot

Junction-to-case (bottom) thermal resistance(7)

1.7

°C/W

6.5 Electrical Characteristics

TA = 25°, PVDD_x = 24 V, DVDD = AVDD = 3.3 V, RL= 8 Ω, BTL BD mode, fS = 48 kHz (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

High-level output voltage

ADR/FAULT and SDA

IOH = –4 mA

DVDD = AVDD = 3 V

2.4

VOL

Low-level output voltage

IOL = 4 mA

DVDD = AVDD = 3 V

0.5

IIL

Low-level input current

Digital Inputs

VI < VIL

DVDD = AVDD = 3.6 V

μA

IIH

High-level input current

VI > VIH

DVDD = AVDD = 3.6 V

μA

IDD

3.3-V supply current

3.3-V supply voltage

(DVDD, AVDD)

Normal mode

Reset (RST = low, PDN =

high)

TAS5751M Datasheet(PDF) 6 Page - Texas Instruments

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