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TAS3103DBT Datasheet(PDF) 99 Page - Texas Instruments |
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TAS3103DBT Datasheet(HTML) 99 Page - Texas Instruments |
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99 / 146 page ![]() 3−39 The transfer curve remains a constant 24 dB above the 1:1 transfer curve for input levels above and below T2 until the computed DRC gain coefficient falls within the dynamic range of a 5.23 format number. For input levels above T2, k2 implements a 5:1 compression, At an input level 7.5 dB above T2 (−62.5 dB), the DRC transfer curve has risen 7.5/5 = 1.5 dB. The boost at this point is 30 dB - (7.5 dB - 1.5 dB) = 24 dB. The DRC has come out of gain saturation. For input levels above −62.5 dB, the transfer curve exhibits 5:1compression. Table 3−5. DRC Example 2 Parameters DRC PARAMETER REQUIRED (SPECIFIED) VALUE (NET GAINSAP Input-DRC = 0 dB) I2C COEFFICIENT VALUE T2 −22 dBInput ≥ −70 dBDRC −70/−6.0206= 11.626748 = 0x000005D0394825.23 Format T1 −102 dBInput ≥ −150 dBDRC −150/−6.0206 = 24.91446 = 0x00000C750D0925.23 Format O2 −30 dB (−30 + 24.0824)/6.0206 = −0.982892 = 0xFFFFFF82309825.23 Format O1 50 dB (50 + 24.0824)/6.0206 = 12.304820 = 0x00000627045825.23 Format k2 5:1 Compression (1/5) − 1 = −0.8 = 0xF99999A5.23 Format k1 1:2 Expansion 2 − 1 = 1 = 0x08000005.23 Format k0 2:1 Compression (1/2) − 1 = −0.5 = 0xFC000005.23 Format For input levels below T2, k1 implements a 1:2 expansion. With a 1:2 expansion in effect, the transfer curve has dropped 12 dB at an input level 6 dB below T2. The boost at this level is 30 dB − (12 dB − 6 dB) = 24 dB. The DRC gain coefficient has again come out of saturation. For input levels below −76 dB and above −150 dB, the transfer curve exhibits a 1:2 expansion. At T1 (-150 dB), the transfer curve is 50 dB below the 1:1 transfer curve. Since O1 = 50 dB, there is no discontinuity in the transfer function. For inputs below −150 dB, k0 implements a 2:1 compression. The change from a 2:1 compression to a 1:1 transfer at −192 dB is due to 32-bit dynamic range saturation at the DRC input. 3.7.3.3 Example 3—1:1 Transfer/Infinite Compression With Minimum Gain Saturation, 32-Bit Dynamic Range Saturation, and Equal Threshold Settings (T1=T2) The DRC transfer function parameters for this example are given in Table 3−6. In addition to illustrating minimum gain saturation, this example also illustrates the operation of the DRC when T1 and T2 are set equal. |
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