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MP3 Audio Decoder

PT8401

PT8401 v 1.3

Page 9

Updated March 2002

Princeton Technology Corp.

PARALLEL BITSTREAM INPUT INTERFACE

In addition to the serial interface, the microcontroller can also transmit bitstreams via parallel interface.

Parallel Mode is set via the Start-up Configuration or command register SP_SEL. Parallel data

transmission consists of the following signals:

1. PD_REQ : Parallel Data Request. A bundle of data may be requested and this is sent from

PT8401.

2. PD_ENA : Parallel Data Enable. This means that the data in the data bus is valid. This is sent

from microcontroller.

3. PD_ACK : Parallel Data Acknowledge. This means that the decoder has received one byte

successfully. This is sent from PT8401.

4. P_DATA : Parallel Data Bus is GPIO[15:8]. The GPIO15 is MSB and GPIO8 is LSB.

Due to some low speed transmission, the microcontroller may not be fast enough to know that PT8401

has closed communication. Please refer to the example described in Figure 6 wherein during the byte

7 transmission. In this example, PT8401 did not recognize an Acknowledge signal; thus, byte 7 was

not transmitted correctly.

In order to avoid instability, it is better not to set SP_SEL frequently.

Figure 7 : Parallel Data Transmission Timing

B0

PD_REQ

PD_ENA

PD_ACK

P_DATA[7:0]

B8

B7

B6

B2

B1