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PT8401 Datasheet(PDF) 16 Page - Princeton Technology Corp |
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PT8401 Datasheet(HTML) 16 Page - Princeton Technology Corp |
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16 / 28 page ![]() Tel : 886-2-29162151 Fax: 886-2-29174598 URL: http://www.princeton.com.tw MP3 Audio Decoder PT8401 PT8401 v 1.3 Page 16 Updated March 2002 Princeton Technology Corp. 0x46 Set_SAO Bit 5:4 00 : ACQO is generated from the Internal Clock. 01 : ACQO is generated from the External Clock. 10 : MCLKO is generated from the External Clock. 0x0 R/W Second Serial Input Port Mode Setting Bit 0 0 : ALRQ Signal. Left is "Low". 1 : ALRQ Signal. Left is "High". 0x47 Set_SAI2 Bit 1 0 : Relative Timing No Delay to ALRQ. 1 : Relative Timing One Delay to ALRQ. 0x0 R/W 0x59 ADPCM_FS_SE L ADPCM Decoding Mode Sampling Frequency Selection. 0 : 11.025kHz. 1 : 12kHz. 2 : 8kHz 0x0 R/W 0x5a Soft_Reset Set to 1 to software reset, but all the command registers keep the setting values. 0x0 W 0x5e Pwr_Dwn_Reg Power Down Control Register. 0x0 W 0x63 Fward_Num Fast Foward Mode, number of frame to be play 0x6 W 0x64 Skip_Num Fast Foward Mode, number of frame to be skip 0x6 W PLL SETTING COMMAND Address Register Name Description Default R/W 0x48 MclkSel Master Oversampling Output Clock Selection. “0” : 256fs. “1” : 384fs. 0x0 R/W 0x4b PllSet PLL Control Parameter Setting. 0x3b28 R/W 0x4c PllFraction 15-bit PLL Fraction Parameter Setting. 0x7e5e R/W |
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